📄 xianshi.s
字号:
.module xianshi.c
.area text(rom, con, rel)
.dbfile E:\实验\DS1302\显示/delay.c
.dbfunc e delay_1us _delay_1us fV
.even
_delay_1us::
.dbline -1
.dbline 4
; //ICC-AVR application builder : 2006-12-8 21:26:52
; // Target : M32
; // Crystal: 4.0000Mhz
;
.dbline 5
; #include <iom16v.h>
nop
.dbline -2
L1:
.dbline 0 ; func end
ret
.dbend
.dbfunc e delay_nus _delay_nus fV
; i -> R20,R21
; n -> R22,R23
.even
_delay_nus::
xcall push_gset2
movw R22,R16
.dbline -1
.dbline 9
; #include <macros.h>
; #include "delay.c"
; #include "disp.h"
; void port_init(void)
.dbline 10
; {
clr R20
clr R21
.dbline 11
; PORTA = 0x00;
xjmp L6
L3:
.dbline 12
xcall _delay_1us
L4:
.dbline 11
subi R20,255 ; offset = 1
sbci R21,255
L6:
.dbline 11
cp R20,R22
cpc R21,R23
brlo L3
.dbline -2
L2:
xcall pop_gset2
.dbline 0 ; func end
ret
.dbsym r i 20 i
.dbsym r n 22 i
.dbend
.dbfunc e delay_1ms _delay_1ms fV
; i -> R16,R17
.even
_delay_1ms::
.dbline -1
.dbline 16
; DDRA = 0xFF;
; PORTB = 0x00;
; DDRB = 0xFF;
; PORTC = 0x00;
; DDRC = 0x00;
.dbline 18
clr R16
clr R17
xjmp L11
L8:
.dbline 18
L9:
.dbline 18
subi R16,255 ; offset = 1
sbci R17,255
L11:
.dbline 18
; PORTD = 0x00;
; DDRD = 0xFE;
cpi R16,141
ldi R30,0
cpc R17,R30
brlo L8
.dbline -2
L7:
.dbline 0 ; func end
ret
.dbsym r i 16 i
.dbend
.dbfunc e delay_nms _delay_nms fV
; i -> R20,R21
; n -> R22,R23
.even
_delay_nms::
xcall push_gset2
movw R22,R16
.dbline -1
.dbline 22
; }
; //UART0 initialize
; // desired baud rate: 9600
; // actual: baud rate:9615 (0.2%)
.dbline 23
; // char size: 8 bit
clr R20
clr R21
.dbline 24
; // parity: Disabled
xjmp L16
L13:
.dbline 25
.dbline 26
xcall _delay_1ms
.dbline 27
L14:
.dbline 24
subi R20,255 ; offset = 1
sbci R21,255
L16:
.dbline 24
cp R20,R22
cpc R21,R23
brlo L13
.dbline -2
L12:
xcall pop_gset2
.dbline 0 ; func end
ret
.dbsym r i 20 i
.dbsym r n 22 i
.dbend
.area lit(rom, con, rel)
_SEG_table::
.byte 192,249
.byte 164,176
.byte 153,146
.byte 130,248
.byte 128,144
.dbfile E:\实验\DS1302\显示/disp.h
.dbsym e SEG_table _SEG_table A[10:10]kc
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
_led_bit8Buff::
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.dbsym e led_bit8Buff _led_bit8Buff A[8:8]c
_led_bit6Buff::
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.blkb 2
.area idata
.byte 0,0
.area data(ram, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.dbsym e led_bit6Buff _led_bit6Buff A[6:6]c
.area text(rom, con, rel)
.dbfile E:\实验\DS1302\显示/disp.h
.dbfunc e disp_bit8 _disp_bit8 fV
.even
_disp_bit8::
.dbline -1
.dbline 20
.dbline 21
ldi R24,1
out 0x18,R24
.dbline 22
ldi R24,<_SEG_table
ldi R25,>_SEG_table
lds R30,_led_bit8Buff
clr R31
add R30,R24
adc R31,R25
lpm R30,Z
out 0x18,R30
.dbline 23
ldi R24,2
out 0x18,R24
.dbline 24
ldi R24,<_SEG_table
ldi R25,>_SEG_table
lds R30,_led_bit8Buff+1
clr R31
add R30,R24
adc R31,R25
lpm R30,Z
out 0x18,R30
.dbline 25
; void uart0_init(void)
ldi R24,4
out 0x18,R24
.dbline 26
; {
ldi R24,<_SEG_table
ldi R25,>_SEG_table
lds R30,_led_bit8Buff+2
clr R31
add R30,R24
adc R31,R25
lpm R30,Z
out 0x18,R30
.dbline 27
; UCSRB = 0x00; //disable while setting baud rate
ldi R24,8
out 0x18,R24
.dbline 28
; UCSRA = 0x00;
ldi R24,<_SEG_table
ldi R25,>_SEG_table
lds R30,_led_bit8Buff+3
clr R31
add R30,R24
adc R31,R25
lpm R30,Z
out 0x18,R30
.dbline -2
L17:
.dbline 0 ; func end
ret
.dbend
.dbfile E:\实验\DS1302\显示\xianshi.c
.dbfunc e port_init _port_init fV
.even
_port_init::
.dbline -1
.dbline 10
.dbline 11
clr R2
out 0x1b,R2
.dbline 12
ldi R24,255
out 0x1a,R24
.dbline 13
out 0x18,R2
.dbline 14
out 0x17,R24
.dbline 15
out 0x15,R2
.dbline 16
out 0x14,R2
.dbline 17
out 0x12,R2
.dbline 18
ldi R24,254
out 0x11,R24
.dbline -2
L21:
.dbline 0 ; func end
ret
.dbend
.dbfunc e uart0_init _uart0_init fV
.even
_uart0_init::
.dbline -1
.dbline 26
.dbline 27
clr R2
out 0xa,R2
.dbline 28
out 0xb,R2
.dbline 29
; UCSRC = BIT(URSEL) | 0x06;
ldi R24,134
out 0x20,R24
.dbline 30
; UBRRL = 0x19; //set baud rate lo
ldi R24,25
out 0x9,R24
.dbline 31
; UBRRH = 0x00; //set baud rate hi
out 0x20,R2
.dbline 32
; UCSRB = 0x98;
ldi R24,152
out 0xa,R24
.dbline -2
L22:
.dbline 0 ; func end
ret
.dbend
.area vector(rom, abs)
.org 52
jmp _uart0_rx_isr
.area text(rom, con, rel)
.dbfile E:\实验\DS1302\显示\xianshi.c
.dbfunc e uart0_rx_isr _uart0_rx_isr fV
.even
_uart0_rx_isr::
.dbline -1
.dbline 37
; }
;
; #pragma interrupt_handler uart0_rx_isr:14
; void uart0_rx_isr(void)
; {
.dbline -2
L23:
.dbline 0 ; func end
reti
.dbend
.dbfunc e init_devices _init_devices fV
.even
_init_devices::
.dbline -1
.dbline 43
; //uart has received a character in UDR
; }
;
; //call this routine to initialize all peripherals
; void init_devices(void)
; {
.dbline 45
; //stop errant interrupts until set up
; CLI(); //disable all interrupts
cli
.dbline 46
; port_init();
xcall _port_init
.dbline 47
; uart0_init();
xcall _uart0_init
.dbline 49
;
; MCUCR = 0x00;
clr R2
out 0x35,R2
.dbline 50
; GICR = 0x00;
out 0x3b,R2
.dbline 51
; TIMSK = 0x00; //timer interrupt sources
out 0x39,R2
.dbline 52
; SEI(); //re-enable interrupts
sei
.dbline -2
L24:
.dbline 0 ; func end
ret
.dbend
.dbfunc e main _main fV
.even
_main::
.dbline -1
.dbline 57
; //all peripherals are now initialized
; }
;
; void main()
; {init_devices();
.dbline 57
xcall _init_devices
xjmp L27
L26:
.dbline 59
.dbline 60
xcall _disp_bit8
.dbline 61
ldi R16,10
ldi R17,0
xcall _delay_nms
.dbline 62
L27:
.dbline 58
xjmp L26
X0:
.dbline -2
L25:
.dbline 0 ; func end
ret
.dbend
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