📄 xianshi.lst
字号:
__text_start:
__start:
0036 E5CF LDI R28,0x5F
0037 E0D8 LDI R29,0x8
0038 BFCD OUT 0x3D,R28
0039 BFDE OUT 0x3E,R29
003A 51C0 SUBI R28,0x10
003B 40D0 SBCI R29,0
003C EA0A LDI R16,0xAA
003D 8308 STD Y+0,R16
003E 2400 CLR R0
003F E6EE LDI R30,0x6E
0040 E0F0 LDI R31,0
0041 E010 LDI R17,0
0042 36EE CPI R30,0x6E
0043 07F1 CPC R31,R17
0044 F011 BEQ 0x0047
0045 9201 ST R0,Z+
0046 CFFB RJMP 0x0042
0047 8300 STD Z+0,R16
0048 E5EE LDI R30,0x5E
0049 E0F0 LDI R31,0
004A E6A0 LDI R26,0x60
004B E0B0 LDI R27,0
004C E010 LDI R17,0
004D 36EC CPI R30,0x6C
004E 07F1 CPC R31,R17
004F F021 BEQ 0x0054
0050 95C8 LPM
0051 9631 ADIW R30,1
0052 920D ST R0,X+
0053 CFF9 RJMP 0x004D
0054 940E00CF CALL _main
_exit:
0056 CFFF RJMP _exit
FILE: E:\实验\DS1302\显示\delay.c
(0001) #define DELAY_C
(0002) #define XTAL 1 //晶振频率，单位MHz 定义为全局变量
(0003) void delay_1us(void) //1us延时函数
(0004) {
(0005) asm("nop");
_delay_1us:
0057 0000 NOP
0058 9508 RET
_delay_nus:
i --> R20
n --> R22
0059 940E00E0 CALL push_gset2
005B 01B8 MOVW R22,R16
(0006) }
(0007)
(0008) void delay_nus(unsigned int n) //N us延时函数
(0009) {
(0010) unsigned int i=0;
005C 2744 CLR R20
005D 2755 CLR R21
(0011) for (i=0;i<n;i++)
005E C003 RJMP 0x0062
(0012) delay_1us();
005F DFF7 RCALL _delay_1us
0060 5F4F SUBI R20,0xFF
0061 4F5F SBCI R21,0xFF
0062 1746 CP R20,R22
0063 0757 CPC R21,R23
0064 F3D0 BCS 0x005F
0065 940E00D7 CALL pop_gset2
0067 9508 RET
(0013) }
(0014)
(0015) void delay_1ms(void) //1ms延时函数
(0016) {
(0017) unsigned int i;
(0018) for (i=0;i<(unsigned int)(XTAL*143-2);i++);
_delay_1ms:
i --> R16
0068 2700 CLR R16
0069 2711 CLR R17
006A C002 RJMP 0x006D
006B 5F0F SUBI R16,0xFF
006C 4F1F SBCI R17,0xFF
006D 380D CPI R16,0x8D
006E E0E0 LDI R30,0
006F 071E CPC R17,R30
0070 F3D0 BCS 0x006B
0071 9508 RET
_delay_nms:
i --> R20
n --> R22
0072 940E00E0 CALL push_gset2
0074 01B8 MOVW R22,R16
(0019) }
(0020)
(0021) void delay_nms(unsigned int n) //N ms延时函数
(0022) {
(0023) unsigned int i=0;
0075 2744 CLR R20
0076 2755 CLR R21
(0024) for (i=0;i<n;i++)
0077 C003 RJMP 0x007B
(0025) {
(0026) delay_1ms();
0078 DFEF RCALL _delay_1ms
0079 5F4F SUBI R20,0xFF
007A 4F5F SBCI R21,0xFF
007B 1746 CP R20,R22
007C 0757 CPC R21,R23
007D F3D0 BCS 0x0078
007E 940E00D7 CALL pop_gset2
0080 9508 RET
FILE: E:\实验\DS1302\显示\disp.h
(0001) #define led1 PORTB=0X01
(0002) #define led2 PORTB=0X02
(0003) #define led3 PORTB=0X04
(0004) #define led4 PORTB=0X08
(0005) #define led5 PORTB=0X10
(0006) #define led6 PORTB=0X20
(0007) #define led7 PORTB=0X40
(0008) #define led8 PORTB=0X80
(0009)
(0010) #define led9 PORTD=0X80
(0011) #define led10 PORTD=0X40
(0012) #define led11 PORTD=0X20
(0013) #define led12 PORTD=0X10
(0014) #define led13 PORTD=0X08
(0015) #define led14 PORTD=0X04
(0016) const char SEG_table[10]={0XC0,0XF9,0XA4,0XB0,0X99,0X92,0X82,0XF8,0X80,0X90};
(0017) char led_bit8Buff[]={0,0,0,0,0,0,0,0};
(0018) char led_bit6Buff[]={0,0,0,0,0,0};
(0019) void disp_bit8()
(0020) {
(0021) led1;
_disp_bit8:
0081 E081 LDI R24,1
0082 BB88 OUT 0x18,R24
(0022) PORTB=SEG_table[led_bit8Buff[0]];
0083 E584 LDI R24,0x54
0084 E090 LDI R25,0
0085 91E00060 LDS R30,led_bit8Buff
0087 27FF CLR R31
0088 0FE8 ADD R30,R24
0089 1FF9 ADC R31,R25
008A 91E4 LPM R30,0(Z)
008B BBE8 OUT 0x18,R30
(0023) led2;
008C E082 LDI R24,2
008D BB88 OUT 0x18,R24
(0024) PORTB=SEG_table[led_bit8Buff[1]];
008E E584 LDI R24,0x54
008F E090 LDI R25,0
0090 91E00061 LDS R30,led_bit8Buff+1
0092 27FF CLR R31
0093 0FE8 ADD R30,R24
0094 1FF9 ADC R31,R25
0095 91E4 LPM R30,0(Z)
0096 BBE8 OUT 0x18,R30
(0025) led3;
0097 E084 LDI R24,4
0098 BB88 OUT 0x18,R24
(0026) PORTB=SEG_table[led_bit8Buff[2]];
0099 E584 LDI R24,0x54
009A E090 LDI R25,0
009B 91E00062 LDS R30,led_bit8Buff+2
009D 27FF CLR R31
009E 0FE8 ADD R30,R24
009F 1FF9 ADC R31,R25
00A0 91E4 LPM R30,0(Z)
00A1 BBE8 OUT 0x18,R30
(0027) led4;
00A2 E088 LDI R24,0x8
00A3 BB88 OUT 0x18,R24
(0028) PORTB=SEG_table[led_bit8Buff[3]];
00A4 E584 LDI R24,0x54
00A5 E090 LDI R25,0
00A6 91E00063 LDS R30,led_bit8Buff+3
00A8 27FF CLR R31
00A9 0FE8 ADD R30,R24
00AA 1FF9 ADC R31,R25
00AB 91E4 LPM R30,0(Z)
00AC BBE8 OUT 0x18,R30
00AD 9508 RET
FILE: E:\实验\DS1302\显示\xianshi.c
(0001) //ICC-AVR application builder : 2006-12-8 21:26:52
(0002) // Target : M32
(0003) // Crystal: 4.0000Mhz
(0004)
(0005) #include <iom16v.h>
(0006) #include <macros.h>
(0007) #include "delay.c"
(0008) #include "disp.h"
(0009) void port_init(void)
(0010) {
(0011) PORTA = 0x00;
_port_init:
00AE 2422 CLR R2
00AF BA2B OUT 0x1B,R2
(0012) DDRA = 0xFF;
00B0 EF8F LDI R24,0xFF
00B1 BB8A OUT 0x1A,R24
(0013) PORTB = 0x00;
00B2 BA28 OUT 0x18,R2
(0014) DDRB = 0xFF;
00B3 BB87 OUT 0x17,R24
(0015) PORTC = 0x00;
00B4 BA25 OUT 0x15,R2
(0016) DDRC = 0x00;
00B5 BA24 OUT 0x14,R2
(0017) PORTD = 0x00;
00B6 BA22 OUT 0x12,R2
(0018) DDRD = 0xFE;
00B7 EF8E LDI R24,0xFE
00B8 BB81 OUT 0x11,R24
00B9 9508 RET
(0019) }
(0020) //UART0 initialize
(0021) // desired baud rate: 9600
(0022) // actual: baud rate:9615 (0.2%)
(0023) // char size: 8 bit
(0024) // parity: Disabled
(0025) void uart0_init(void)
(0026) {
(0027) UCSRB = 0x00; //disable while setting baud rate
_uart0_init:
00BA 2422 CLR R2
00BB B82A OUT 0x0A,R2
(0028) UCSRA = 0x00;
00BC B82B OUT 0x0B,R2
(0029) UCSRC = BIT(URSEL) | 0x06;
00BD E886 LDI R24,0x86
00BE BD80 OUT 0x20,R24
(0030) UBRRL = 0x19; //set baud rate lo
00BF E189 LDI R24,0x19
00C0 B989 OUT 0x09,R24
(0031) UBRRH = 0x00; //set baud rate hi
00C1 BC20 OUT 0x20,R2
(0032) UCSRB = 0x98;
00C2 E988 LDI R24,0x98
00C3 B98A OUT 0x0A,R24
00C4 9508 RET
(0033) }
(0034)
(0035) #pragma interrupt_handler uart0_rx_isr:14
(0036) void uart0_rx_isr(void)
(0037) {
_uart0_rx_isr:
00C5 9518 RETI
(0038) //uart has received a character in UDR
(0039) }
(0040)
(0041) //call this routine to initialize all peripherals
(0042) void init_devices(void)
(0043) {
(0044) //stop errant interrupts until set up
(0045) CLI(); //disable all interrupts
_init_devices:
00C6 94F8 BCLR 7
(0046) port_init();
00C7 DFE6 RCALL _port_init
(0047) uart0_init();
00C8 DFF1 RCALL _uart0_init
(0048)
(0049) MCUCR = 0x00;
00C9 2422 CLR R2
00CA BE25 OUT 0x35,R2
(0050) GICR = 0x00;
00CB BE2B OUT 0x3B,R2
(0051) TIMSK = 0x00; //timer interrupt sources
00CC BE29 OUT 0x39,R2
(0052) SEI(); //re-enable interrupts
00CD 9478 BSET 7
00CE 9508 RET
(0053) //all peripherals are now initialized
(0054) }
(0055)
(0056) void main()
(0057) {init_devices();
_main:
00CF DFF6 RCALL _init_devices
00D0 C004 RJMP 0x00D5
(0058) while(1)
(0059) {
(0060) disp_bit8();
00D1 DFAF RCALL _disp_bit8
(0061) delay_nms(10);
FILE: <library>
00D2 E00A LDI R16,0xA
00D3 E010 LDI R17,0
00D4 DF9D RCALL _delay_nms
00D5 CFFB RJMP 0x00D1
00D6 9508 RET
pop_gset2:
00D7 E0E2 LDI R30,2
00D8 940C00E6 JMP pop
push_gset5:
00DA 92FA ST R15,-Y
00DB 92EA ST R14,-Y
push_gset4:
00DC 92DA ST R13,-Y
00DD 92CA ST R12,-Y
push_gset3:
00DE 92BA ST R11,-Y
00DF 92AA ST R10,-Y
push_gset2:
00E0 937A ST R23,-Y
00E1 936A ST R22,-Y
push_gset1:
00E2 935A ST R21,-Y
00E3 934A ST R20,-Y
00E4 9508 RET
pop_gset1:
00E5 E0E1 LDI R30,1
pop:
00E6 9149 LD R20,Y+
00E7 9159 LD R21,Y+
00E8 FDE0 SBRC R30,0
00E9 9508 RET
00EA 9169 LD R22,Y+
00EB 9179 LD R23,Y+
00EC FDE1 SBRC R30,1
00ED 9508 RET
00EE 90A9 LD R10,Y+
00EF 90B9 LD R11,Y+
00F0 FDE2 SBRC R30,2
00F1 9508 RET
00F2 90C9 LD R12,Y+
00F3 90D9 LD R13,Y+
00F4 FDE3 SBRC R30,3
00F5 9508 RET
00F6 90E9 LD R14,Y+
00F7 90F9 LD R15,Y+
00F8 9508 RET
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