📄 try2.mdl
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ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType Abs
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
}
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParameterDataTypeMode "Same as input"
ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType InitialCondition
Value "1"
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Integrator
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
IgnoreLimit off
ZeroCross on
}
Block {
BlockType Math
Operator "exp"
OutputSignalType "auto"
SampleTime "-1"
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Reference
}
Block {
BlockType RelationalOperator
Operator ">="
InputSameDT on
LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType SignalGenerator
WaveForm "sine"
TimeSource "Use simulation time"
Amplitude "1"
Frequency "1"
Units "Hertz"
VectorParams1D on
}
Block {
BlockType Sin
SineType "Time based"
TimeSource "Use simulation time"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
SampleTime "-1"
VectorParams1D on
}
Block {
BlockType StateSpace
A "1"
B "1"
C "1"
D "1"
X0 "0"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType UnitDelay
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "try2"
Location [0, 82, 1012, 743]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Analog\nFilter Design"
Ports [1, 1]
Position [450, 277, 515, 333]
SourceBlock "dsparch4/Analog\nFilter Design"
SourceType "Analog Filter Design"
method "Butterworth"
filttype "Lowpass"
N "8"
Wlo "40*pi"
Whi "80"
Rp "2"
Rs "40"
Port {
PortNumber 1
Name "unmoduled signal"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "Analog\nFilter Design1"
Ports [1, 1]
Position [440, 72, 505, 128]
SourceBlock "dsparch4/Analog\nFilter Design"
SourceType "Analog Filter Design"
method "Butterworth"
filttype "Lowpass"
N "8"
Wlo "40*pi"
Whi "80"
Rp "2"
Rs "40"
}
Block {
BlockType Reference
Name "Continuous-Time\nVCO"
Ports [1, 1]
Position [315, 137, 405, 183]
Orientation "left"
SourceBlock "commsynccomp2/Continuous-Time\nVCO"
SourceType "Continuous-Time VCO"
ShowPortLabels on
Ac "2"
Fc "50"
Kc "1"
Ph "pi/2"
}
Block {
BlockType Reference
Name "Continuous-Time\nVCO1"
Ports [1, 1]
Position [315, 212, 405, 258]
Orientation "left"
SourceBlock "commsynccomp2/Continuous-Time\nVCO"
SourceType "Continuous-Time VCO"
ShowPortLabels on
Ac "2"
Fc "50"
Kc "1"
Ph "0"
}
Block {
BlockType SubSystem
Name "LF"
Ports [1, 1]
Position [635, 189, 735, 231]
Orientation "left"
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskHideContents off
System {
Name "LF"
Location [2, 82, 797, 553]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [115, 168, 145, 182]
IconDisplay "Port number"
}
Block {
BlockType Sum
Name "Add"
Ports [2, 1]
Position [310, 162, 340, 193]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add1"
Ports [2, 1]
Position [510, 172, 540, 203]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Constant
Name "Constant"
Position [135, 85, 165, 115]
Value "2"
}
Block {
BlockType Constant
Name "Constant1"
Position [200, 310, 230, 340]
Value "0.5"
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [285, 265, 335, 300]
NamePlacement "alternate"
InputSameDT off
RndMeth "Floor"
}
Block {
BlockType Product
Name "Product2"
Ports [2, 1]
Position [205, 150, 255, 185]
NamePlacement "alternate"
InputSameDT off
RndMeth "Floor"
}
Block {
BlockType UnitDelay
Name "Unit Delay"
Position [390, 163, 425, 197]
}
Block {
BlockType Outport
Name "Out1"
Position [630, 183, 660, 197]
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Product2"
SrcPort 1
DstBlock "Add"
DstPort 1
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [20, 0]
DstBlock "Product2"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
Points [30, 0]
Branch {
DstBlock "Product2"
DstPort 2
}
Branch {
Points [0, 100]
DstBlock "Product1"
DstPort 1
}
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