xllp_ak2440.h

PXA270硬件测试源代码

#pragma once
/******************************************************************************
**
**  COPYRIGHT (C) 2001, 2002 Intel Corporation.
**
**  This software as well as the software described in it is furnished under
**  license and may only be used or copied in accordance with the terms of the
**  license. The information in this file is furnished for informational use
**  only, is subject to change without notice, and should not be construed as
**  a commitment by Intel Corporation. Intel Corporation assumes no
**  responsibility or liability for any errors or inaccuracies that may appear
**  in this document or any software that may be provided in association with
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       ak2440.h
**
**  PURPOSE: contains interface info and data for the AKM ak2440 audio codec
**           
**                  
**
******************************************************************************/
//#include <bvd1.h>
//#include <bvd1bd.h>
#include "xllp_defs.h"
#include "xllp_i2s.h"
#include "xllp_i2c.h"
#include "xllp_ssp.h"
#include "xllp_acodec.h"
/*
typedef enum _XLLP_AK2440_REGS_T {
		AK_RSVD0=0,
		AK_RESET,		//write to warm reset the codec
		AK_REVNUM,		//revision number
		AK_PDCNT1,		//power on/off control
		AK_PDCNT2,		//power on/off control 
		AK_PDCNT3,		//power on/off control
		AK_POPMUTE,  
		AK_RXPTHCNT1,	//rx path control 1
		AK_RXPTHCNT2,	//rx path control 2
		AK_RSVD1,
		AK_STADDCNT,	//Side tone control
		AK_TXPTHCNT,	//TX PATH CONTROL
		AK_RXATSET,		//RX ATT Gain Level Setting
		AK_TXVRSET,		//TX VR GAIN level
		AK_VR1SET,		//VR gain level
		AK_VR2SET,
		AK_VR3SET,
		AK_VR4SET,
		AK_VR5SET,
		AK_TXATTSET,
		AK_VRSTSET,
		AK_MASTERVOL,
		AK_LEFTVOL,
		AK_RIGHTVOL,
		AK_CLKCNT,   //clock settings
		AK_DACIFCNT, //dac interface settings
		AK_DACGAIN,  //dac gain settings
		AK_CLKCNT2,  //clock settings
		AK_RXATT2SET,  //rx att 2 gain level setting
		AK_RSVD2, // 0X1D
		AK_CODECSET,  //pcm codec settings
		AK_VR6SET,
		AK_RXPTHCNT3,
		AK_RXPTHCNT4,
		AK_MCLKSET //0X22

} XLLP_AK2440_REGS_T;
*/
#define AK_LASTREG	 0x22
#define AK_REGINC    0x1  //distance between regs in bytes //ac97 is 2

#define AK_RSVD0	 0x0		
#define AK_RESET	 0x2		//write to warm reset the codec		
#define AK_REVNUM	 0x2		//revision number		
#define AK_PDCNT1	 0x3		//power on/off control		
#define AK_PDCNT2	 0x4		//power on/off control 		
#define AK_PDCNT3	 0x5		//power on/off control		
#define AK_POPMUTE	 0x6  		
#define AK_RXPTHCNT1 0x7	//rx path control 1		
#define AK_RXPTHCNT2 0x8	//rx path control 2		
#define AK_RSVD1	 0x9		
#define AK_STADDCNT	 0xA	//Side tone control		
#define AK_TXPTHCNT	 0xB	//TX PATH CONTROL		
#define AK_RXATSET	 0xC		//RX ATT Gain Level Setting		
#define AK_TXVRSET	 0xD		//TX VR GAIN level		
#define AK_VR1SET	 0xE		//VR gain level		
#define AK_VR2SET	 0xF		
#define AK_VR3SET	 0x10		
#define AK_VR4SET	 0x11		
#define AK_VR5SET	 0x12		
#define AK_TXATTSET	 0x13		
#define AK_VRSTSET	 0x14		
#define AK_MASTERVOL 0x15		
#define AK_LEFTVOL	 0x16		
#define AK_RIGHTVOL	 0x17		
#define AK_CLKCNT	 0x18  //clock settings		
#define AK_DACIFCNT	 0x19 //dac interface settings		
#define AK_DACGAIN	 0x1A  //dac gain settings		
#define AK_CLKCNT2	 0x1B  //clock settings		
#define AK_RXATT2SET 0x1C  //rx att 2 gain level setting		
#define AK_RSVD2	 0x1D // 0X1D		
#define AK_CODECSET	 0x1E  //pcm codec settings		
#define AK_VR6SET	 0x1F		
#define AK_RXPTHCNT3 0x20		
#define AK_RXPTHCNT4 0x21		
#define AK_MCLKSET	 0x22 //0X22		

extern XLLP_ACODEC_ERROR_T XllpAkSetMasterVol(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T GainInDb);
extern XLLP_ACODEC_ERROR_T XllpAkGetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkGetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkSetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkSetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkEnableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpAkDisableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpAkCodecSpecificInit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpAKCodecWrite(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_UINT16_T regOffset, XLLP_UINT16_T regVal);
extern XLLP_ACODEC_ERROR_T XllpAKCodecRead(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_UINT16_T regOffset, XLLP_UINT16_T *regVal);
extern XLLP_ACODEC_ERROR_T XllpAkCodecSpecificDeinit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpAKEnterEuipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T State);
extern XLLP_ACODEC_ERROR_T XllpAKQueryEquipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T * State);