dpx_api.h

交换机中常用芯片链路复用7350的驱动源代码(vxworks中实现)

/******************************************************************************/
/**  COPYRIGHT (C) 1999 PMC-SIERRA, INC. ALL RIGHTS RESERVED.                **/
/**--------------------------------------------------------------------------**/
/** This software embodies materials and concepts which are proprietary and  **/
/** confidential to PMC-Sierra, Inc.                                         **/
/** PMC-Sierra distributes this software to its customers pursuant to the    **/ 
/** terms and conditions of the Device Driver Software License Agreement     **/ 
/** contained in the text file software.lic that is distributed along with   **/ 
/** the device driver software. This software can only be utilized if all    **/ 
/** terms and conditions of the Device Driver Software License Agreement are **/ 
/** accepted. If there are any questions, concerns, or if the Device Driver  **/
/** Software License Agreement text file, software.lic, is missing please    **/
/** contact PMC-Sierra for assistance.                                       **/
/**--------------------------------------------------------------------------**/
/**                                                                          **/
/******************************************************************************/
/*******************************************************************************
**    MODULE     : Duplex device drivers API header file
**
**    FILE       : dpx_api.h
**      
**    DESCRIPTION: This file contains constants and structure definitions 
**                 required by the Duplex device drivers API.
**
**
**    NOTES      :
**
*******************************************************************************/
/* 
**    MODIFICATION HISTORY:
**
** $Log: dpx_api.h.rca $
** 
**  Revision: 1.1 Wed Aug 16 16:22:11 2000 bhalwani
**    Beta-1.0
**
** 
**  3   06/15/00    Bhalwani        Vortex chipset driver beta-1.0
**  2   06/15/00    Bhalwani        Vortex chipset driver Alpha-1.30
**  1   06/17/99    chenkemi        Initial Version
**
**  14  06/17/99    chenkemi        Beta-1.0
**  13  06/17/99    chenkemi        removed u1TxFifoDepth from sDPX_HSS_REGS structure.
**  12  06/11/99    chenkemi        change pCellType prototype
**  11  05/28/99    chenkemi        added "DPX_REGISTER_TEST_VALUE"
**  10  05/27/99    chenkemi        Re-organized header files
**  9   05/25/99    chenkemi        code cleanup after code review
**  8   05/12/99    chenkemi        renamed "dpx_hwif.h" to "dpx_hw.h"
**  7   04/08/99    chenkemi        modified "sysfDuplexIntHandler" prototype.
**  6   04/01/99    chenkemi        added some EVENT_ID definition
**  5   03/30/99    chenkemi        re-organized the header file and added statistical 
**                                  couns data structure.
**  4   03/25/99    chenkemi        added some prototypes
**  3   03/19/99    chenkemi        Version Alpha1.1
**  2   03/10/99    chenkemi        changed Interrupt Context structure.
**  1   03/02/99    chenkemi        Initial Version
**
*/



#ifndef _DPX_API_H
#define _DPX_API_H

/** include files **/
#include "dpx_rtos.h"
#include "dpx_hw.h"
#include "dpx_err.h"


/****************************************************/
/* define for interrupt enable flags */
#define DPX_ACTIVE_HIGH         1   	/* enabled */
#define DPX_INACTIVE_LOW        0	/* disabled */

#define DPX_INT_ENABLE          1
#define DPX_INT_DISABLE         0

/* define for Register test value */
#define DPX_REGISTER_TEST_VALUE   0xAA

/* Duplex specific enumerated types */

/*-------- Duplex state -------*/
typedef enum _eDpx_State
{
    DPX_EMPTY = 0,
    DPX_PRESENT,
    DPX_INIT,
    DPX_ACTIVE     
}eDPX_STATE;    

/* Duplex device interface mode */
typedef enum _eDpx_Mode
{
    DPX_SCI_MASTER = 0,
    DPX_SCI_ANY_SLAVE,
    DPX_CLK_BIT_SER, 	/* clocked serial data mode */
	DPX_MODE_UNKNOWN
} eDPX_MODE;


/* Duplex HSS Link Selection method */
typedef enum _eDpx_Hss_Lnk_Sel
{
    DPX_RX_HSS_LNK_SELECT_AUTO = 0,
    DPX_RX_HSS_LNK_SELECT_RXD1,
    DPX_RX_HSS_LNK_SELECT_RXD2
} eHSS_LNK_SEL;

/* defines for HSS configuration register ID */
typedef enum _eDpx_Hss_Reg_Id
{
   DPX_RX_HSS_CFG_RXD0 = 0,
   DPX_RX_HSS_CFG_RXD1,
   DPX_RX_HSS_CELL_FILTER_CFG_RXD0,
   DPX_RX_HSS_CELL_FILTER_CFG_RXD1,
   DPX_TX_HSS_CFG,
   DPX_ALL_HSS_REGS
} eDPX_HSS_REG;

/* defines for Sci-PHY/Any-Phy configuration register ID */
typedef enum _eDpx_Sci_Any_Reg_Id
{
    DPX_SCI_ANY_PHY_EXT_ADDR_MATCH = 0,
    DPX_SCI_ANY_PHY_EXT_ADDR_MASK,
    DPX_SCI_ANY_PHY_OUT_ADDR_MATCH,
    DPX_SCI_ANY_PHY_INP_CFG_1,
    DPX_SCI_ANY_PHY_INP_CFG_2,
    DPX_SCI_ANY_PHY_ICA_ENBL_LSB,
    DPX_SCI_ANY_PHY_ICA_ENBL_2,
    DPX_SCI_ANY_PHY_ICA_ENBL_3,
    DPX_SCI_ANY_PHY_ICA_ENBL_MSB,
    DPX_SCI_ANY_PHY_OUT_CFG,
    DPX_SCI_ANY_PHY_OUT_POLL_RNG,
    DPX_ALL_PHY_REGS
} eDPX_SCI_ANY_PHY_REG;

typedef enum _eDpx_Clk_Ser_Reg
{
    DPX_CLK_SER_RX_CHNL_CFG = 0,
    DPX_CLK_SER_RX_INT_ENBLS,
    DPX_CLK_SER_RX_INT_STATUS,
    DPX_CLK_SER_RX_HCS_ERR_CNT,
    DPX_CLK_SER_LCD_CNT_THRESH,
    DPX_CLK_SER_TX_DATA,
    DPX_CLK_SER_TX_SER_FRM_BIT_THRESH
} eDPX_CLK_SER_REG;

/* user-defined indication callback type */
typedef enum _eDpx_Cb_Type
{
    DPX_CB_NOTIFY = 0,
    DPX_CB_RX_BOC,
    DPX_CB_RX_CELL
}eDPX_CB_TYPE; 

/* Interrupt enable bit state, used for each single bit */
typedef enum _eDpx_Int_En_Flag
{
    DPX_INT_BIT_DISABLE = 0,
    DPX_INT_BIT_ENABLE
} eDPX_INT_EN_FLAG;

/* Duplex SCI/ANY-PHY registers */
typedef struct _dpx_sci_any_Phy_Regs
{
    UINT1		u1ExtAddrMatch[2];
    UINT1		u1ExtAddrMask[2];
    UINT1 		u1OutAddrMatch;
    UINT1		u1SciAnyPhyInpCfg[2];
    UINT1		u1ICAEnable[4];
    UINT1		u1SciAnyPhyOutCfg;
    UINT1		u1SciAnyPhyOutPollRng;
} sDPX_SCI_ANY_PHY_REGS;

/* Duplex High Speed Serial Link registers */
typedef struct _dpx_hss_Regs
{
    UINT1		u1RxCfg[2];
    UINT1		u1RxHcsPass[2];
    UINT1		u1TxCfg;
} sDPX_HSS_REGS;

/* Duplex Clocked Serial Interface Registers */
typedef struct _dpx_clk_ser_Regs
{
    UINT1		u1RxCfg[16];
    UINT1		u1RxLcdCntThresh[16];
	UINT1       u1TxSerIndChnlData[16];
    UINT1		u1TxFrameBitThresh;
} sDPX_CLK_SER_REGS;

/* Duplex Interrupt Enables */
typedef struct _dpx_int_Enbls
{
     UINT1               u1MasterEn;
     UINT1               u1ROOLEn;
     UINT1               u1SciAnyPhyInpIntEn;
     UINT1               u1SciAnyPhyOutIntEn;
     UINT1               u1MicroCellBufCtrl;
     UINT1		         u1RxLogChnlFifoCtrl;
     UINT1		         u1RxHssExtractFifoOvr[2];
     UINT1               u1RxHssIntEn[2];
     UINT1               u1RxHssBocIntEn[2];
     UINT1		         u1TxLogChnlFifoCtrl;
     UINT1		         u1RxClkSerIntEn[16];       
}sDPX_INT_ENBLS;
 


/* Duplex Cell control structure */  
typedef struct _dpx_Cell_Ctrl
{
/*    UINT1               u1CrcFlg;   */
    UINT4               u4Crc32Prev;
    UINT4               u4Crc32;
    UINT1               u1CellType;
}sDPX_CELL_CTRL;
   
/* Duplex Cell Header structure */ 
typedef struct _dpx_Cell_Hdr
{
    UINT1               u1UsrPrpnd[2];
    UINT1               u1Hdr[5];
    UINT1               u1UDF;
}sDPX_CELL_HDR;

/* Duplex Control Register */
typedef struct _dpx_Regs
{
    UINT1               u1MasterCfg;
    sDPX_SCI_ANY_PHY_REGS sSciAnyPhyRegs;
    sDPX_HSS_REGS       sHssRegs;
    sDPX_CLK_SER_REGS	sClkSerRegs;
    sDPX_INT_ENBLS      sIntEnRegs;
}sDPX_REGS;


/* define for Indication event */
#define DPX_EVENT_BASE      100
typedef enum _eDpx_Event_Id
{
    /* Type 1 events */
    DPX_EVENT_TX_HSS_COUNT_OVERFLOW = DPX_EVENT_BASE, /* register 0x61, bit 5 */
    DPX_EVENT_TX_HSS_COUNT_UPDATED,                   /* register 0x61, bit 6 */
    DPX_EVENT_RX_LC_FIFO_OVERFLOW,                    /* register 0x3D, bit 0 */
    DPX_EVENT_TX_LC_FIFO_OVERFLOW,                    /* register 0x5D, bit 0 */
    DPX_EVENT_PHY_INPUT_CELL_XFERED,                  /* register 0x0F, bit 2 */
    DPX_EVENT_INVALID_SOC_SEQUENCE,                   /* register 0x0F, bit 1 */
    DPX_EVENT_PHY_INPUT_PARITY,                       /* register 0x0F, bit 0 */