util.h

一个两碟控制的VCD的代码,两碟之间的转动及连续播放,已大量生产的CODE.

/* SCCSID @(#)util.h	1.1 11/19/97 */ 


/*
 * $Log$
 */

#include "../mvd.h"
#include "common.h"

register volatile int *mvd asm("r27");

#define lwpeek(addr)		mvd[addr]
#define lwpoke(addr, data)	mvd[addr] = data

#if 0
#define DMAWIDTH0       (320/4)	/* y screen */
#define DMAWIDTH1       (160/4)	/* uv screen */
#define DMAWIDTH2       (720/4)	/* refresh */
#define DMAWIDTH3       (512/4)	/* whoever */  
#endif

#ifdef HRES
#define DMAWIDTH0       102	/* y screen */
#define DMAWIDTH1       51	/* uv screen */
#define DMAWIDTH2       88	/* refresh */
#else
#define DMAWIDTH0       88      /* y screen */
#define DMAWIDTH1       44      /* uv screen */
#define DMAWIDTH2       44      /* refresh */
#endif
#define DMAWIDTH3       (512/4)	/* whoever */  

/*
 * **************** Risc Interface ****************
 */
#define RIFACE_STLD_IRQSUPRESS	0x0000C000
#define RIFACE_LD_IRQSUPRESS	0x00004000
#define RIFACE_ST_IRQSUPRESS	0x00008000

#define xport_irq		0x00000001
#define tim1_irq		0x00000002
#define tim2_irq		0x00000004
#define vin_irq			0x00000008
#define vout_irq		0x00000010
#define rdma_irq		0x00000020
#define vpcmdq_irq		0x00000040
#define buscon_irq		0x00000080
#define huff_irq		0x00000100
#define host_irq		0x00000200
#define aud_irq			0x00000400
#define tdm_irq			0x00000800
#define gateway_irq		0x00001000
#define debug_irq		0x00002000
	
#define enable_int(ch) {					\
	int tmp;						\
	mvd[riface_irqsuppress] =0;	asm("nop"); asm("nop");	\
	tmp = mvd[riface_irqmask];				\
	tmp |= cat2(ch,_irq);					\
	mvd[riface_irqmask] = tmp;				\
}

#define disable_int(ch) {					\
	int tmp;						\
	mvd[riface_irqsuppress] =0;	asm("nop"); asm("nop");	\
	tmp = mvd[riface_irqmask] ;				\
	tmp &= ~cat2(ch,_irq);					\
	mvd[riface_irqmask] =tmp;				\
}

/*
 * **************** Risc DMA ****************
 */


#define cmdq_vprd            mvd[buscon_cmdque_vprd]        = 0x0
#define rdma_transr_enable	0x00000001
#define rdma_refh_enable	0x00000002
#define rdma_gater_enable	0x00000004
#define rdma_gatew_enable	0x00000008
#define rdma_hostr_enable	0x00000010
#define rdma_hostw_enable	0x00000020
#define rdma_audiow_enable	0x00000040

#define disable_rdma(ch)	lwpoke(rdma_disable,cat3(rdma_,ch,_enable))
#define enable_rdma(ch)		lwpoke(rdma_enable, cat3(rdma_,ch,_enable))
#define clear_rdma_done(ch)	lwpoke(rdma_done, cat3(rdma_,ch,_enable))

#define rdma_xfer(ch, adr, cnt, pri) do {	\
  mvd[rdma_disable] = cat3(rdma_,ch,_enable);	\
  mvd[cat3(rdma_,ch,_addr)] = (int)(adr) >> 1;	\
  mvd[cat3(rdma_,ch,_cnt)] = cnt;		\
  mvd[cat3(rdma_,ch,_pri)] = pri;		\
  mvd[rdma_enable] = cat3(rdma_,ch,_enable);	\
} while (0)

#define	rdma_is_done(ch) \
  (mvd[rdma_done] & cat3(rdma_,ch,_enable))

#define rdma_wait(ch) do {			\
  (void) mvd[rdma_done]; /* read twice */	\
  do {} while (!rdma_is_done(ch));		\
} while(0)


/*
 * **************** Bus Controller DMA ****************
 */
#define buscon_vp_runbit        0x00000001
#define buscon_yscnnr_runbit    0x00000002
#define buscon_yscn_runbit      0x00000004
#define buscon_uscn_runbit      0x00000008
#define buscon_vscn_runbit      0x00000010
#define buscon_ycamnr_runbit    0x00000020
#define buscon_ycam_runbit      0x00000040
#define buscon_ucam_runbit      0x00000080
#define buscon_vcam_runbit      0x00000100
#define buscon_xportv_runbit    0x00000200
#define buscon_xporta_runbit    0x00000400
#define buscon_audio_in_runbit	0x00000800
#define buscon_audio_out_runbit	0x00001000
#define buscon_hotout_runbit	0x00002000
#define buscon_ref_runbit	0x00004000
#define buscon_b2r_runbit	0x00008000
#define buscon_hufdecv_runbit	0x00010000
#define buscon_hufdeca_runbit	0x00020000
#define buscon_m2h_runbit	0x00040000
#define buscon_hufenc_runbit	0x00080000
#define buscon_h2m_runbit	0x00100000
#define buscon_r2b_runbit	0x00200000

#define buscon_xa1_runbit	buscon_hufenc_runbit
#define buscon_xa2_runbit	buscon_audio_in_runbit

#define buscon_dma_deltas_xa1	buscon_dma_deltas_hufenc
#define buscon_dma_xpos_xa1	buscon_dma_xpos_hufenc
#define buscon_dma_ypos_xa1	buscon_dma_ypos_hufenc

#define buscon_dma_deltas_xa2	buscon_dma_deltas_audio_in
#define buscon_dma_xpos_xa2	buscon_dma_xpos_audio_in
#define buscon_dma_ypos_xa2	buscon_dma_ypos_audio_in

#define buscon_a2d_runbit	buscon_audio_in_runbit
#define buscon_dma_deltas_a2d	buscon_dma_deltas_audio_in
#define buscon_dma_xpos_a2d	buscon_dma_xpos_audio_in
#define buscon_dma_ypos_a2d	buscon_dma_ypos_audio_in

#define buscon_d2a_runbit	buscon_audio_out_runbit
#define buscon_dma_deltas_d2a	buscon_dma_deltas_audio_out
#define buscon_dma_xpos_d2a	buscon_dma_xpos_audio_out
#define buscon_dma_ypos_d2a	buscon_dma_ypos_audio_out

#define BDMA_INC2      0x1000  /* Increment Y position by 2 when DMAing*/
#define BDMA_WIDTH0    0x0000  /* Use width0 for y increments           */
#define BDMA_WIDTH1    0x0200  /* Use width1 for y increments           */
#define BDMA_WIDTH2    0x0400  /* Use width2 for y increments           */
#define BDMA_WIDTH3    0x0600  /* Use width3 for y increments           */
#define BDMA_USEDX     0x0800  /* Use dx for y increments               */

#define flush_xportv    0x80
#define flush_xporta    0x40
#define flush_hufenc    0x20
#define flush_r2b       0x10
#define flush_b2r       0x00    /* Doesn't really exists */
#define flush_d2a       0x00    /* Doesn't really exists */

#define DY_MAX	0x80	/* for VCP 0x40 */

#define buscon_zap(ch) do {                     \
  buscon_irq_disable(ch); \
  buscon_disable(ch);                           \
  /*do {;} while (buscon_is_running(ch));*/     \
} while (0)


#define buscon_is_running(ch) \
  (mvd[buscon_dma_status] & cat3(buscon_,ch,_runbit))

#define buscon_wait(ch) do {		\
  while (buscon_is_running(ch)) ;	\
  gbl_gate_control &= ~flush_##ch;	\
  mvd[gate_control] = gbl_gate_control;	\
} while (0)

#define buscon_wait_timeout(ch, timeout) do {           \
  int timeout_count = 0;                                \
  while (buscon_is_running(ch)) {                       \
    timeout_count++;                                    \
    if (timeout_count > timeout) {                      \
      EPRINTF(("pending_status = 0x%x at %d, %s\n",     \
        mvd[buscon_dma_pending],__LINE__,__FILE__));    \
      break;                                            \
    }                                                   \
  }                                                     \
  gbl_gate_control &= ~flush_##ch;			\
  mvd[gate_control] = gbl_gate_control;			\
} while(0)

#define buscon_disable(ch) mvd[buscon_dma_disable] = cat3(buscon_,ch,_runbit)
#define buscon_enable(ch)  mvd[buscon_dma_enable] = cat3(buscon_,ch,_runbit)

extern int gbl_buscon_irqmasks;

#define buscon_irq_enable(ch) do {			\
  do {} while (!buscon_is_running(ch));			\
  mvd[riface_irqsuppress] = 0; asm("nop"); asm("nop");	\
  gbl_buscon_irqmasks |= cat3(buscon_,ch,_runbit);	\
  mvd[buscon_dma_irqmasks] = gbl_buscon_irqmasks;	\
} while (0)

#define buscon_irq_disable(ch) do {			\
  mvd[riface_irqsuppress] = 0; asm("nop"); asm("nop");	\
  gbl_buscon_irqmasks &= ~cat3(buscon_,ch,_runbit);	\
  mvd[buscon_dma_irqmasks] = gbl_buscon_irqmasks;	\
} while (0)

#define a2x(a)	((a) & 0x1ff)
#define a2y(a)	((a) >> 9)

#define buscon_xfer(ch, mode, addr, dx, dy) do {			   \
  mvd[cat2(buscon_dma_deltas_,ch)] = ((0x80 - (dy)) << 9) | (0x200 - (dx));\
  mvd[cat2(buscon_dma_xpos_,ch)] = (mode) | a2x(addr);			   \
  mvd[cat2(buscon_dma_ypos_,ch)] = a2y(addr);				   \
} while(0)

#define buscon_quick_BframeComp(ch, addr, mode, BframeComp) do { 		   \
  mvd[cat2(buscon_dma_xpos_,ch)] = (mode) | a2x(addr);	   \
  mvd[cat2(buscon_dma_ypos_,ch)] = BframeComp + a2y(addr);		   \
} while(0)

#define buscon_quick(ch, addr, mode) buscon_quick_BframeComp(ch, addr, mode, 0)


/*
 * **************** RISC fifo ****************
 */
#define GATE_TREMASK    0x02
#define GATE_DWMASK     0x01

#define get_riscfifo(answer)	do {				\
    int timeout = 0;						\
    while (!(lwpeek(gate_status) & GATE_DWMASK)){		\
	timeout++;						\
	if (timeout>0x400000) {					\
	    EPRINTF(("GateRiscFF DW timeout\n")); break;	\
	}							\
    }								\
    answer = lwpeek(gate_risc_fifo);				\
} while (0)

#define put_riscfifo(data)	do {				\
    int timeout = 0;						\
    while (!(lwpeek(gate_status) & GATE_TREMASK)){		\
	timeout++;						\
	if (timeout>0x400000) {					\
	    EPRINTF(("GateRiscFF TRE timeout\n")); break;	\
	}							\
    }								\
    lwpoke(gate_risc_fifo,data);				\
} while (0)

/*---- Dram linear address definition ----------------- */
#ifdef MPEG1
#define START_IQUANT	(MPEG1_DSTART_QUANT<<2)
#define START_VBV	(MPEG1_DSTART_VBV<<2)
#define START_ABV	(MPEG1_DSTART_ABV<<2)
#else
#define START_IQUANT	0x046400
#define START_VBV	0x046800
#define START_ABV	0x091800
#endif

#ifdef DRIVER
extern int gbl_gate_control;
extern int timer2_period;   /* Period for timer2. Set at run time   */
#endif

void    RISC_timer2_interrupt_service(void);
void    RISC_start_timer2(void);

void	risc_fifo_read(int *p, int n);
void	risc_fifo_write(int *p, int n);
void	sram_to_dram(int dst, int *srcp, int n);