webvcda1.cfg

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/* Copyright 1998, ESS Technology, Inc.					*/
/* SCCSID @(#)webvcda1.cfg	1.4 05/21/98 */

/*
 * $Log$
 */

/*
 * Configuration for ESS Webvcd Rev. A1 board
 *
 * CPU:		64.8MHz 3228
 *		3881
 *
 * Summary:
 *
 *		Philips
 * AUX0:	b DSA Ack
 * AUX1:	b DSA Data
 * AUX2:	o DSC_S
 * AUX3:	b DSA Strobe
 * AUX4:	i Interrupt
 * AUX5:
 * AUX6:	
 * AUX7:	i MIC ARCLK
 *
 * EAUX0:
 * EAUX1:	b VFD Data
 * EAUX2:	i Flash busy
 * EAUX3:	
 * EAUX4:	i PAL/NTSC
 * EAUX5:
 * EAUX6:
 * EAUX7:
 * EAUX8:	o VFD Strobe
 * EAUX9:	o VFD Clock
 * EAUX10:
 * EAUX11:	o IRQ
 * EAUX12:	
 * EAUX13:	i GSH interrupt
 * EAUX14:	i ES2820 INT
 * EAUX15:	i IR
 *
 * LCS0:	unused
 * LCS1:	0x14000003:	3207 communication
 *		0x1400001b:	Emulator data
 *		0x1400001f:	Emulator status
 *		0x140000a0:	EDSP control 		(was 0x14000008)
 *		0x140000e0:	Hardware configuration/status (was 0x1400000c)
 *		0x14000120:	IDMA address cycle	(was 0x14000010)
 *		0x14000160:	IDMA address cycle	(was 0x14000014)
 *		0x140001a0:	IDMA data cycle		(was 0x14000018)
 *		0x140001e0:	IDMA data cycle		(was 0x1400001c)
 * LCS2:	16b Flash (1 piece of 256Kx16 or 512Kx16)
 * LCS3:	8b ROM (5 wait states)
 */

/************************************************************************
 *			Philips loader control				*
 ************************************************************************/
#define	CLEAR_DSA_ACK		CLEAR_AUX0
#define	CLEAR_DSA_DATA		CLEAR_AUX1
#define	CLEAR_DSA_STROBE	CLEAR_AUX3

#define	SET_DSA_ACK		TRISTATE_AUX0
#define	SET_DSA_DATA		TRISTATE_AUX1
#define	SET_DSA_STROBE		TRISTATE_AUX3

#define	DSA_ACK_HIGH		AUX0_HIGH
#define	DSA_DATA_HIGH		AUX1_HIGH
#define	DSA_STROBE_HIGH		AUX3_HIGH

#define	DSA_ACK_LOW		(!DSA_ACK_HIGH)
#define	DSA_DATA_LOW		(!DSA_DATA_HIGH)
#define	DSA_STROBE_LOW		(!DSA_STROBE_HIGH)

/************************************************************************
 *				VFD control				*
 ************************************************************************/
#define SET_VFD_CLK		SET_EAUX9
#define SET_VFD_DATA		SET_EAUX1
#define SET_VFD_STROBE		SET_EAUX8

#define CLEAR_VFD_CLK		CLEAR_EAUX9
#define CLEAR_VFD_DATA		CLEAR_EAUX1
#define CLEAR_VFD_STROBE	CLEAR_EAUX8

#define TRISTATE_VFD_DATA       TRISTATE_EAUX1
#define VFD_DATA_HIGH		EAUX1_HIGH

#ifdef VFD_STB_ACTIVE_HIGH
/* E.g. BU2872 */
#define	VFD_STROBE_ACTIVE	SET_VFD_STROBE
#define	VFD_STROBE_INACTIVE	CLEAR_VFD_STROBE
#else
/* E.g. D16312, MN12510 */
#define	VFD_STROBE_ACTIVE	CLEAR_VFD_STROBE
#define	VFD_STROBE_INACTIVE	SET_VFD_STROBE
#endif /* else of VFD_STB_ACTIVE_HIGH */


/************************************************************************
 *				3207 Interface				*
 ************************************************************************/
#define	DSC_SELECT		SET_AUX2
#define	DSC_DESELECT		CLEAR_AUX2
#define DSC_ADDRESS		(char *) x14000003

/************************************************************************
 *			    ROM	Emulator Interface			*
 ************************************************************************/
/* 
 * This board uses the new emulator.
 *
 * Has to use char pointer (otherwise the delay is too long) 
 */
#define HOST_DATA		(*(char*) x1400001b)
#define HOST_STATUS		(*(volatile char*) x1400001f)

/************************************************************************
 *				Misc. Inputs				*
 ************************************************************************/
/*
 * Misc. input controls (NTSC/PAL, S-video/composite)
 */
#define	IS_TV_NTSC		EAUX4_HIGH
#define	S_VIDEO_ON		0		/* S-vide is not ON	*/



/************************************************************************
 *				Special defines				*
 ************************************************************************/
/* This board has 4MB of DRAM */
#define	BUSCON_DRAM_CONTROL	(DRAM_RFENBL+DRAM_CFG4+DRAM_SPD2T3T3T)