📄 dsc.c
字号:
DSC_cmd(dsc_clkctl, 0x40); /* Power down 3210. Don't use *
* div 8, it doesn't work with *
* 3881! (was 0x44) */
#endif
while (1);
}
#endif /* POWER_ON */
#endif
/*
* This routine powers up 3210. 3207/9 will reset 3210 so this routine
* will never return.
*/
#if (!CUST71 || POWER_ON)
void DSC_powerup()
{
int clkctl = 0x71; /* PLL, PCLK2X, divider 1, boot */
mvd[riface_irqmask] = 0; /* Disable all interrupts */
#ifdef CLKDIV
shadow_cchip_ctl = 0x30; /* Audio mute, warm boot */
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
#ifdef IR_PHILIPS
clkctl |= ((IR_ctlbit & 1) << 1); /* Record the last control bit *
* Don't change b2. 3881 can't *
* take it! */
#endif
DSC_cmd(dsc_clkctl, clkctl);
#else
DSC_cmd(dsc_clkctl, 0x10); /* Turn on PCLK2X. Don't use *
* div 8: it doesn't work with *
* 3881 (was 0x14) */
shadow_cchip_ctl = 0x30; /* Audio mute, warm boot */
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
DSC_cmd(dsc_clkctl, 0x70); /* Power up 3210 */
#endif
while (1);
}
#endif /* POWER_ON */
/*
* Initialize 3207
*/
void DSC_init()
{
DSC_toggle(); /* Just in case */
#ifndef DVD_VCD
#ifdef C80
SET_MUTEON;
#endif
#if NO_MICRO && (!(CUST71 || TCSERVO) || POWER_ON)
/* If A/C is just turned on, we want to power down to standby mode */
if (DSC_status == DSC_STATUS_ACON) {
/* init the game and vcd20 save memory */
int *ptr;
#ifdef PLAY20
ptr = RISC_ptr_realtime;
*ptr-- = 0; /* resume info */
*ptr-- = 0; /* game score */
*ptr = 11; /* game score */
#endif
DSC_powerup();
}
#endif /* POWER_ON */
#endif /* none DVD_VCD */
if (IS_POWER_DOWN) {
/* In power-down mode. Turn off few parts of 3207 */
#ifdef DVD_VCD
DSC_cmd(dsc_audioacnt0h, 0x16);
#else
DSC_cmd(dsc_audioacnt0h, 0x06); /* Disable MCLK output */
#endif
#ifdef CLKDIV
shadow_cchip_ctl |= DSC_CCHIP_CTL_IR_EN;
/* Enable interrupt for 3881. */
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
DSC_cmd(dsc_clkctl, 0x30); /* PLL, PCLK2X, divider 0 */
#else
shadow_cchip_ctl = 0x28 | DSC_CCHIP_CTL_IR_EN;
/* Audio mute, power saving, *
* disable MIC/audio. Enable *
* interrupt for 3881. */
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
DSC_cmd(dsc_clkctl, 0); /* Shut pclk and pclk2x. Don't *
* use div 8: it doesn't work *
* with 3881! (was 0x4) */
#endif
#if (!CUST71 || POWER_ON)
#ifdef C80
SET_POWER_OFF;
#endif
#endif
} else {
DSC_status = DSC_STATUS_RUNNING;/* With 8051, A/C on goes to *
* run state, so fake it! */
#ifdef ES3207A
shadow_cchip_ctl = 0x30 | DSC_CCHIP_CTL_IR_EN;
/* Warm and Audio mute. Enable *
* interrupt for 3881 */
#else
shadow_cchip_ctl = 0x10 | DSC_CCHIP_CTL_IR_EN;
/* Warm and Audio mute. Enable *
* interrupt for 3881. */
#endif
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
DSC_cmd(dsc_dvectl4, 0x31); /* enable sync outputs */
#ifdef SVIDEO
#ifdef SVIDEO_SELECT
if (EAUX11_HIGH) {
DSC_cmd(dsc_dvectl3, 0x07);
svideo_setting = 1;
/* enable composite video dac only */
} else {
DSC_cmd(dsc_dvectl3, 0x01);
svideo_setting = 0;
}
/* enable composite + s-video */
#else
DSC_cmd(dsc_dvectl3, 0x01);
/* enable composite + s-video */
#endif
#else
DSC_cmd(dsc_dvectl3, 0x07);
/* enable composite video dac only */
#endif /* SVIDEO */
DSC_cmd(dsc_clkctl, 0x39); /* enable dve, PLL, PCLK2X, PCLK*
* Divider set to 1 (running) */
DSC_cmd(dsc_audioadc2, 0x00 | AUDIOADC2_RESET);
/* Reset A2D to minimize noise */
#ifdef ECHO
shadow_audioxmt1 = 0x69; /* Invert ATFS; output ACLK; *
* MSB first; down sampling *
* mute zero (VA and later) */
#else /* no echo */
#ifdef CUST3
/* Why LSB first????? */
shadow_audioxmt1 = 0x62; /* Invert ATFS; external ACLK *
* LSB first *
* mute zero (VA and later) */
#else
shadow_audioxmt1 = 0x60; /* Invert ATFS; external ACLK *
* MSB first (irrelevant) *
* mute zero (VA and later) */
#endif /* end ifdef CUST3 */
#endif /* end ifdef ECHO */
DSC_cmd(dsc_audioxmt1, shadow_audioxmt1);
DSC_cmd(dsc_audiodbg, 0x01);
#ifdef ES3207A /* When we are using 3207 DAC */
#ifdef FS384
/* Generate and drive 16.9344MHz clock */
#ifdef CUST3
DSC_cmd(dsc_audioacnt0h, 0x16); /* disable MCLK */
#else
DSC_cmd(dsc_audioacnt0h, 0x76); /* 3207 outputs clock */
#endif
DSC_cmd(dsc_audioacnt0l, 0x20); /* 16.9344 MHz */
DSC_cmd(dsc_audioacnt1h, 0x0c);
DSC_cmd(dsc_audioacnt1l, 0x5c);
#else /* not FS384 */
/* Generate and drive 11.2896MHz clock */
#ifdef DVD_VCD
DSC_cmd(dsc_audioacnt0h, 0x16); /* disable MCLK */
#else
if (DSC_version == 0) {
DSC_cmd(dsc_audioacnt0h, 0x66); /* 3207 outputs clock */
} else {
DSC_cmd(dsc_audioacnt0h, 0xf6); /* 3207 outputs clock */
DSC_cmd(dsc_audioapllm, 0x7c); /* 44.1K, 256fs, 11.2896MHz. */
DSC_cmd(dsc_audioaplln, 0x30);
}
#endif
DSC_cmd(dsc_audioacnt0l, 0x20); /* 11.2896 MHz */
DSC_cmd(dsc_audioacnt1h, 0x07);
DSC_cmd(dsc_audioacnt1l, 0x7a);
#endif /* end of #ifdef FS384 */
DSC_cmd(dsc_audiorcv1, 0x80 | AUDIORCV1_DITHER);
/* Right adjusted & reset */
#ifdef FS384
DSC_cmd(dsc_audiorcv2, 0x11); /* 24b cycle frame (384*FS) */
#else
DSC_cmd(dsc_audiorcv2, 0x10); /* 16b cycle frame (256*FS) */
#endif
DSC_cmd(dsc_audiorcv1, 0x90 | AUDIORCV1_DITHER);
/* Enable (disable reset) */
#ifndef ZERO_BUFFER
shadow_cchip_ctl |= 0x1; /* Enable video DAC only */
#else
/*
* When zero buffer is used, we'll not call DSC_reset_audio,
* so we need to turn on audio DAC once and for all.
*/
shadow_cchip_ctl |= 0x3; /* Enable video+audio DAC */
#endif
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
#else /* NOT ES3207A */
/* When using external audio DAC */
#ifdef ECHO
/* Generate and drive 11.2896MHz clock */
if (DSC_version == 0) {
DSC_cmd(dsc_audioacnt0h, 0x66); /* 3207 outputs clock */
} else {
DSC_cmd(dsc_audioacnt0h, 0xf6); /* 3207 outputs clock */
DSC_cmd(dsc_audioapllm, 0x7c); /* 44.1K, 256fs, 11.2896MHz.*/
DSC_cmd(dsc_audioaplln, 0x30);
}
DSC_cmd(dsc_audioacnt0l, 0x20); /* 11.2896 MHz */
DSC_cmd(dsc_audioacnt1h, 0x07);
DSC_cmd(dsc_audioacnt1l, 0x7a);
#else
DSC_cmd(dsc_audioacnt0h, 0x06); /* Disable 3207's clock */
#endif
shadow_cchip_ctl |= 0x21; /* Enable the external DAC (i.e.*
* disable the mute pin) */
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
#if (C80 && POWER_ON)
SET_POWER_ON;
#endif
#endif /* ES3207A */
#ifdef ECHO
if (!DSC_version) {
/*
* For 3207, enable MIC port early so we have time to charge
* up cap. Don't do this to 3881! Turning on Ain gives bad
* dynamic range!!
*/
shadow_cchip_ctl |= 0x4;
DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);
}
#endif
}
#ifndef DVD_VCD /* fix me ASAP */
/*
* Initialize a 2 second watch dog timer. 3207 operates at 54MHz,
* so 2 second is (n+1)*8/54, and n is 12.5. The initial clock
* setting has to be (0x7f-0xd)|0x80
*/
DSC_cmd(dsc_watchdog, 0xf2);
#endif
}
/*
* Turn off 3207/9's TV encoder
*/
#ifndef CUST71
void DSC_encoder_off()
{
DSC_cmd(dsc_dvectl3, 0x0);
}
#endif
PRIVATE int la_trigger; /* For logic analyzer */
/*
* This routine will be called inside interrupt handler. With 3207, we'll
* be reset by 3207; without 3207, we'll just jump to start up code.
*/
void DSC_dead(trigger)
int trigger;
{
/* Sit here and wait for 3207 to reset us. */
while (1) la_trigger = trigger;
}
#ifdef DSC_IRQ
/*
* This routine updates dsc_aux_mode and dsc_irq_ctl registers.
*
* Inputs:
* on: 0: turning off
* 1: turning on
* edge: 0: trigger on rising edge
* 1: trigger on falling edge
* setmode:0: Don't touch dsc_aux_mode and IRQOUT. They are right (only
* used for change IR trigger edge for Philips IR.)
* 1: Drive IRQOUT high and set dsc_aux_mode (normal case)
* mask: interrupt mask;
* falling:patter to enable triggering on falling edge
*/
PRIVATE void DSC_init_irq_ctl(on, edge, setmode, mask, falling)
int on, edge, setmode, mask, falling;
{
int mode, ctl;
mode = shadow_aux_mode;
ctl = shadow_irq_ctl;
/* Set irq_ctl register */
ctl &= ~mask; /* Clear the mask first */
if (on) {
ctl |= mask; /* Enable the interrupt */
ctl &= ~falling; /* Assume trigger on rising edge*/
if (edge == DSC_FALLING_EDGE)
ctl |= falling;
}
if (setmode) {
/* Set aux_mode register */
mode &= ~2; /* Clear SQCK */
/* If S0S1 is enabled, then enable SQCK */
if (ctl & 2) mode |= 2;
/* If no interrupt mask is on, then disable interrupt output */
mode &= ~1;
if (ctl & 0xf) {
mode |= 1;
CLEAR_IRQOUT; /* Drive EAUX11 low */
CLEAR_IRXOR; /* EAUX11 is active high */
}
/*
* The only time setmode is not set is when changing the
* IR triggering edge for Philips IR. In which case, there
* is no need to change mode.
*/
shadow_aux_mode = mode;
DSC_cmd(dsc_aux_mode, shadow_aux_mode);
}
/*
* Need to protect because we may change IR's edge in IR handler.
* Thus, it is possible that interrupt hits after shadow_irq_ctl
* but before dsc_irq_ctl is really updated.
*
* riface_irqsuppress should be good enought because we do
* riface_irqsuppress inside DSC_cmd;
*/
mvd[riface_irqsuppress] = 0;
asm("nop");
shadow_irq_ctl = ctl;
DSC_cmd(dsc_irq_ctl, shadow_irq_ctl);
}
/*
* Turn ON or OFF IR handling by 3881
* Inputs:
* on: 0: turn off
* 1: turn on
* edge: 0: rising
* 1: falling
* setmode:0: Don't set dsc_aux_mode (assume it is set right already)
* 1: Set dsc_aux_mode as well as pull IRQOUT high (normal case)
*/
void DSC_init_ir(on, edge, setmode)
int on, edge, setmode;
{
TRISTATE_IRIN; /* Allow IR to come in on EAUX15 */
DSC_init_irq_ctl(on, edge, setmode, 1, 0x10);
}
#ifdef DSC_ENABLE_S0S1
/*
* Turn ON or OFF S0S1 handling by 3881
* Inputs:
* on: 0: turn off
* 1: turn on
* edge: 0: rising
* 1: falling
* count: Number of SQCK to drive
*/
void DSC_init_s0s1(on, edge, count)
{
if (on) {
SET_SQCK; /* Initally drive SQCK high */
TRISTATE_SQSO; /* Ready to receive SQDT on EAUX9 */
TRISTATE_S0S1; /* Ready to receive S0S1 on EAUX14 */
DSC_cmd(dsc_subq_bcnt, count); /* Number of subQ clocks */
DSC_cmd(dsc_subq_ctl, 0); /* Set edge etc first. */
}
DSC_init_irq_ctl(on, edge, 1, 2, 0x20);
}
#endif
#ifdef DSC_ENABLE_16550
/*
* Turn ON or OFF "16550" handling by 3881
* Inputs:
* on: 0: turn off
* 1: turn on
* edge: 0: rising
* 1: falling
*/
void DSC_init_16550(on, edge)
{
TRISTATE_16550;
DSC_init_irq_ctl(on, edge, 1, 4, 0x40);
}
#endif
#ifdef DSC_ENABLE_C2PO
/*
* Turn ON or OFF C2PO handling by 3881
* Inputs:
* on: 0: turn off
* 1: turn on
* edge: 0: rising
* 1: falling
*/
void DSC_init_c2po(on, edge)
{
TRISTATE_C2PO;
DSC_init_irq_ctl(on, edge, 1, 8, 0x80);
}
#endif
#endif /* DSC_IRQ */
#else
/*
* This routine will be called inside interrupt handler. With 3207, we'll
* be reset by 3207; without 3207, we'll just jump to start up code.
*/
void DSC_dead(trigger)
int trigger;
{
/*
* Jump to startup code. Startup code is at 0xcffff80, but code
* uses DWORD address, which makes it 0x33fffe0.
*/
asm("addi r0,#0x33f,r22");
asm("lsl r22,r22,#16");
asm("addi r22,#0xffe0,r22");
asm("jspci r22,#0,r0");
asm("nop");
asm("nop");
}
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -