startup.s

来自「一个两碟控制的VCD的代码,两碟之间的转动及连续播放,已大量生产的CODE.」· S 代码 · 共 479 行 · 第 1/2 页

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        nop        beq  r2,r3,Set25                 ; goto Set25        addi r0,#0x7,r2                  ; r2 = 7 (SET23)        nop        beq  r2,r3,Set23                 ; goto Set23        addi r0,#0x8,r2                  ; r2 = 7 (SET23)        nop        beq  r2,r3,Set4                 ; goto Set4        addi r0,#0x9,r2                  ; r2 = 8 (SET4)        nop        beq  r2,r3,Set5                 ; goto Set5        addi r0,#0xa,r2                  ; r2 = 9 (SET5)        nopNextCmd:        addi r7,#0x1,r7                  ; increment loop counter        addi r10,#0x10,r10               ; move pointer to next cmdblk        bne  r7,r11,LoopCmd              ; loop if not done        nop        nopCopy:; copy data from source address to destination address; arguments : src_addr, dest_addr, size; Temp variables:;       r13 : address of source data;       r12 : address of destination;       r6 : loop counter;       r10: start address of command arguments;        ld   0x4[r10],r13                 ; address of source data        ld   0x8[r10],r12                 ; address of destination        ld   0xc[r10],r6                 ; r6 : loop countersize to copy        nop        beq   r0,r6,NextCmd              ; do copy if size > 0        nop        nopLoopCopy:                                            ld   0x0[r13],r2                  ; load one dword        nop        nop                                          st   0x0[r12],r2                  ; copy to dest        nop        addi r13,#0x4,r13                  ; move pointer to next dword data        addi r12,#0x4,r12                  ; move pointer to next target address        addi r6,#-1,r6                   ; decrement loop counter        bne  r6,r0,LoopCopy              ; loop copy        nop        nop        beq   r0,r0,NextCmd              ; continue to next command if done        nop        nop        Clear:; clear memory starting from given address to 0; arguments : start_addr, size; Temp variables:;       r13 : address of source data;       r6 : loop counter;       r10: start address of command arguments;        ld   0x4[r10],r13                 ; starting address to clear        ld   0x8[r10],r6                 ; loop counter : size to clear        nop        beq   r0,r6,NextCmd              ; do clear if size >0        nop        nopLoopClear:        st   0x0[r13],r0                  ; clear one dword        nop        addi r13,#0x4,r13                  ; move to next address        addi r6,#-1,r6                   ; decrement loop counter        bne  r6,r0,LoopClear             ; loop clear        nop        nop        beq   r0,r0,NextCmd              ; continue to next command if done        nop        nopSet25:; set new value of r25; arguments : value; Temp variables:;       r10: start address of command arguments;        beq  r0,r0,NextCmd               ; continue to next command        ld   0x4[r10],r25                ; r25 = value        nopSet24:; set new value of r24; arguments : value; Temp variables:;       r10: start address of command arguments;        beq  r0,r0,NextCmd               ; continue to next command        ld   0x4[r10],r24                ; r24 = value        nopSet23:; set new value of r23; arguments : value; Temp variables:;       r10: start address of command arguments;        beq  r0,r0,NextCmd               ; continue to next command        ld   0x4[r10],r23                ; r23 = value        nopSet4:; set new value of r4; arguments : value; Temp variables:;       r10: start address of command arguments;        beq  r0,r0,NextCmd               ; continue to next command        ld   0x4[r10],r4                ; r23 = value        nop Set5:; set new value of r5; arguments : value; Temp variables:;       r10: start address of command arguments;        beq  r0,r0,NextCmd               ; continue to next command        ld   0x4[r10],r5                ; r23 = value        nop         Jump:; jump to given address; arguments : dest_addr; Temp variables:;       r13 : address to jump to;       r10: start address of command arguments;        ld   0x4[r10],r13                 ; r13 : address to jump        nop        jspci   r13,#0x0,r0               ; jump	nop	nopJsr:; call subroutine starting at given address; arguments : subroutine_addr; Temp variables:;       r13 : address to jump to;       r10: start address of command arguments;        addi r0,#0xafe0,r29        ld   0x4[r10],r13                 ; address to jump         nop        st   0x20[r0],r6        st   0x24[r0],r7        jspci    r13,#0x0,r31        st   0x28[r0],r10        st   0x2c[r0],r11                ; save registers        ld   0x20[r0],r6        ld   0x24[r0],r7        beq   r0,r0,NextCmd              ; continue to next command         ld   0x28[r0],r10        ld   0x2c[r0],r11                ; restore registers; Power up always starts here; Temp. vars:;	r1:	PSW;	r2:	MEMWIDTH/mask;	r3:	MEMDELAY;	r12:	12000000h;	r6;	10000000h;	r21:	Read back from 10000000 (c3h is 3210!!);       r27:    omnibasepowerup:        addi r0,#0xc3,r1        movtos r1,psw			 ; set PSW        addi r0,#0x2000,r27              ; r27 = 0x2000        sh   r0,r27,r27,#16              ; r27 = r27 << 16 (i.e. omnibase)	addi r0,#0x1200,r12	sh   r0,r12,r12,#16		 ; r12 -> non-cachable DRAM 0	addi r0,#0x1000,r6	sh   r0,r6,r6,#16		 ; r6 -> non-cachable 0					 ; (SRAM for 3208, DRAM for 3210)	addi r0,#_WIDTH10_,r2	 	 ; Width for 3210 (bank 0 is DRAM)	st   0x4000[r27],r2		 ; Set RIFACE_WIDTH	; If the chip is 3210, then we can write to DRAM location and	; read it back from the same location from bank 0. If the chip	; is 3208, then bank 0 is not DRAM due to RIFACE_WIDTH set up	st   0x1000[r12],r1		 ; Write 0xc3 to 0x12001000	st   0x0000[r12],r0		 ; Change the data bus value in case					 ; capacitor holds r1 value for the					 ; next read	ld   0x1000[r6],r21		 ; Read from 0x10000000	addi r0,#0xff,r2		 ; r2 = 0xff (mask)	and  r21,r2,r21			 ; Only look at the last 8b	beq  r1,r21,set_delay        addi r0,#_MEMDELAYH_,r3          ; r3  = 0x1d (3208 + wait state)					 ; (Load delay)        sh   r0,r3,r3,#16                ; r3  << = 16 (0x1d0000)es3208:	addi r0,#_MEMWIDTH_,r2		 ; r2 holds width setting for 3208	st   0x4000[r27],r2		 ; Set RIFACE_WIDTH for 3208set_delay:        addi r3,#_MEMDELAYL_,r3          ; r3  = Wait states of memory banks					 ; 1d001e = 1 (0x1a, 0, 0, 0x1e) or					 ; 1d801e = 1 (0x1b, 0, 0, 0x1e)					 ; which means: 3208					 ; bank3:  5 (1a) or 4 (1b) wait states					 ; bank2: 32 wait states					 ; bank1: 32 wait states					 ; bank0:  1 wait states        st   0x4004[r27],r3              ; set RIFACE_WAIT_STATE					 ; Bank3 : 3 wait state        addi r0,#_DRAM_CONTROL_,r2	 ; r2  = DRAM configuration (0x204)					 ; Browser board can also be set to					 ; 0x2ea        st   0x8100[r27],r2              ; set buscon_dram_control;        nop;        st   0x4008[r27],r0             ; RIFACE_TURNOFF_DELAY = 0        st    0x0[r12],r21		 ; If it is 0xc3, then it is 3210;					 ; Otherwise, it is 3208        nop        nop        nop        beq   r0,r0,ParseCmd             ; goto ParseCmd	nop        nopLastLoc:        nop

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