regdef.h

关于DVD的MPEG2用的DSP代码,在DSP的实现MPEG的压缩,解压算法.

# definition for registers in the DSP core	
	
#
# $Author: jshuang $
# $Date: 1998/05/09 01:45:30 $
# $Revision: 1.1 $
#                    

#include "memory.h"

#define r0	$00
#define r1	$01
#define r2	$02
#define r3	$03
#define r4	$04
#define r5	$05
#define r6	$06
#define r7	$07
#define r8	$08
#define r9	$09
#define r10	$10
#define r11	$11
#define r12	$12
#define r13	$13
#define r14	$14
#define r15	$15
#define r16	$16
#define r17	$17
#define r18	$18
#define r19	$19
#define r20	$20
#define r21	$21
#define r22	$22
#define r23	$23
#define r24	$24
#define r25	$25
#define r26	$26
#define r27	$27
#define r28	$28
#define r29	$29
#define r30	$30
#define r31	$31

#define l0	&00
#define l1	&01
#define l2	&02
#define l3	&03
#define l4	&04
#define l5	&05
#define l6	&06
#define l7	&07
#define l8	&08
#define l9	&09
#define l10	&10
#define l11	&11
#define l12	&12
#define l13	&13
#define l14	&14
#define l15	&15
#define l16	&16
#define l17	&17
#define l18	&18
#define l19	&19
#define l20	&20
#define l21	&21
#define l22	&22
#define l23	&23
#define l24	&24
#define l25	&25
#define l26	&26
#define l27	&27
#define l28	&28
#define l29	&29
#define l30	&30
#define l31	&31

#define ByteStart	$32
#define StartAddrHigh	$33
#define StartAddrLow	$34
#define BlockSize   $35
#define BlockSkip   $36
#define DMASize	    $37
#define LocalAddr   $38
#define LocalCount  $39
#define ByteSize    $39
#define DmaWr	    $40
#define DmaRd	    $41
#define SizeSkip    $42
#define ByteDisable $43
#define IcacheSegment $44
#define DmaByteWr   $45
#define DmaByteRd   $46
#define ByteLocal   $47
		      
#define AGRAdr0	    $64
#define AGRInc0	    $65
#define AGRSiz0	    $66
#define AGRMod0	    $67
#define AGRAdr1	    $68
#define AGRInc1	    $69
#define AGRSiz1	    $70
#define AGRMod1	    $71
#define AGRAdr2	    $72
#define AGRInc2	    $73
#define AGRSiz2	    $74
#define AGRMod2	    $75
#define AGRAdr3	    $76
#define AGRInc3	    $77
#define AGRSiz3	    $78
#define AGRMod3	    $79
#define AGRAdr4	    $80
#define AGRInc4	    $81
#define AGRSiz4	    $82
#define AGRMod4	    $83
#define AGRAdr5	    $84
#define AGRInc5	    $85
#define AGRSiz5	    $86
#define AGRMod5	    $87
#define AGRAdr6	    $88
#define AGRInc6	    $89
#define AGRSiz6	    $90
#define AGRMod6	    $91 
#define AGRAdr7	    $92
#define AGRInc7	    $93
#define AGRSiz7	    $94
#define AGRMod7	    $95
		      
#define Gb_Getbits_Ptr	$96
#define Gb_Shadow_Ptr	$97
#define Gb_Control	$98
#define Gb_RdWrPtr	$99
#define Gb_Prev_LocalData	    $100
#define Gb_dma_addr	$101

#define LoopCount	$102
#define ProgCount	$103

#define Pb_RdPtr	$104
#define Pb_WrPtr	$105
#define Pb_Shadow_Ptr   $106
#define Pb_dma_addr	$107
#define Pb_Flush	$108
#define PutByte		$109
#define TrapReg		$110
#define StatusPort	$111
#define StatusReg	$111

#define DcacheBase	$48

;;; definition for AGR registers used as pointers to memory

# agr_adr0, post increment by INC field
#define a0(inc)	@0, inc

# agr_adr1, post increment by INC field
#define a1(inc)	@4,inc

# agr_adr2, post increment by INC field
#define a2(inc)	@8,inc

# agr_adr3, post increment by INC field
#define a3(inc)	@12,inc

# agr_adr4, post increment by INC field
#define a4(inc)	@16,inc

# agr_adr5, post increment by INC field
#define a5(inc)	@20,inc

# agr_adr6, post increment by INC field
#define a6(inc)	@24,inc

# agr_adr7, post increment by INC field
#define a7(inc)	@28,inc


# agr_adr0, post increment by agr_inc0
#define i0	@1

# agr_adr1, post increment by agr_inc1
#define i1	@5

# agr_adr2, post increment by agr_inc2
#define i2	@9

# agr_adr3, post increment by agr_inc3
#define i3	@13

# agr_adr4, post increment by agr_inc4
#define i4	@17

# agr_adr5, post increment by agr_inc5
#define i5	@21

# agr_adr6, post increment by agr_inc6
#define i6	@25

# agr_adr7, post increment by agr_inc7
#define i7	@29
  
#define fail	1
#define pass	0

# upward compatible dma write and dma read instructions
#define dmawi	movi	DmaWr, 
#define dmari	movi	DmaRd, 

//#define dmawr	mov	DmaWr, 
//#define dmarr	mov	DmaRd, 

#define dmabw	la	DmaByteWr,
#define dmabr	la	DmaByteRd,
#define dmabwr	mov	DmaByteWr,
#define dmabrr	mov	DmaByteRd,

	.macro	dmawr	REG
//	movw	%0x2f0,\REG
        movw    dma_tmp_reg,\REG
	shl	\REG,2
	mov	DmaByteWr,\REG
//	movw	\REG,%0x2f0
        movw    \REG,dma_tmp_reg
	.endm

	.macro	dmarr	REG
//	movw	%0x2f0,\REG
        movw    dma_tmp_reg,\REG
	shl	\REG,2
	mov	DmaByteRd,\REG
//	movw	\REG,%0x2f0
        movw    \REG,dma_tmp_reg
	.endm


# status port bits
#define DmaDoneBit  1
#define PbBusyBit   2
#define GbBusyBit   4



        .MACRO  li	TO VALUE
	mupi	\TO, ~(( ~(\VALUE >> 16)) | ( ~0xffff))
	ori	\TO, ~(( ~\VALUE) | ( ~0xffff))
        .ENDM

#define BIT_REV_4	0x800	
#define BIT_REV_8	0x400	
#define BIT_REV_16	0x200	
#define BIT_REV_32	0x100	
#define BIT_REV_64	0x080	
#define BIT_REV_128	0x040	
#define BIT_REV_256	0x020