📄 io_map.h
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.H
** Project : NODE_A
** Processor : MC9S12C64CFA16
** Beantype : IO_Map
** Version : Driver 01.04
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 2006-11-11, 14:37
** Abstract :
** IO_Map.h - implements an IO device's mapping.
** This module contains symbol definitions of all peripheral
** registers and bits.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2005
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef _IO_MAP_H
#define _IO_MAP_H
/* Linker pragmas */
#pragma LINK_INFO DERIVATIVE "MC9S12C32"
#pragma LINK_INFO OSCFREQUENCY "8000000"
#define REG_BASE 0x0000 /* Base address for the I/O register block */
/* Based on CPU DB MC9S12C32_48, version 2.87.339 (RegistersPrg V2.02) */
/* DataSheet : 9S12C-FamilyDGV1/D V01.00 */
#include "PE_Types.h"
#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */
#pragma OPTION ADD V30toV31Compatible "-BfaGapLimitBits4294967295" /*this guarantee correct bitfield positions*/
/*********************************************/
/* */
/* PE I/O map */
/* */
/*********************************************/
/**************** interrupt vector table ****************/
#define VReserved63 0x0000FF80
#define VReserved62 0x0000FF82
#define VReserved61 0x0000FF84
#define VReserved60 0x0000FF86
#define VReserved59 0x0000FF88
#define Vvreglvi 0x0000FF8A
#define Vpwmesdn 0x0000FF8C
#define Vportp 0x0000FF8E
#define VReserved55 0x0000FF90
#define VReserved54 0x0000FF92
#define VReserved53 0x0000FF94
#define VReserved52 0x0000FF96
#define VReserved51 0x0000FF98
#define VReserved50 0x0000FF9A
#define VReserved49 0x0000FF9C
#define VReserved48 0x0000FF9E
#define VReserved47 0x0000FFA0
#define VReserved46 0x0000FFA2
#define VReserved45 0x0000FFA4
#define VReserved44 0x0000FFA6
#define VReserved43 0x0000FFA8
#define VReserved42 0x0000FFAA
#define VReserved41 0x0000FFAC
#define VReserved40 0x0000FFAE
#define Vcantx 0x0000FFB0
#define Vcanrx 0x0000FFB2
#define Vcanerr 0x0000FFB4
#define Vcanwkup 0x0000FFB6
#define Vflash 0x0000FFB8
#define VReserved34 0x0000FFBA
#define VReserved33 0x0000FFBC
#define VReserved32 0x0000FFBE
#define VReserved31 0x0000FFC0
#define VReserved30 0x0000FFC2
#define Vcrgscm 0x0000FFC4
#define Vcrgplllck 0x0000FFC6
#define VReserved27 0x0000FFC8
#define VReserved26 0x0000FFCA
#define VReserved25 0x0000FFCC
#define VReserved24 0x0000FFCE
#define VReserved23 0x0000FFD0
#define Vatd0 0x0000FFD2
#define VReserved21 0x0000FFD4
#define Vsci 0x0000FFD6
#define Vspi 0x0000FFD8
#define Vtimpaie 0x0000FFDA
#define Vtimpaovf 0x0000FFDC
#define Vtimovf 0x0000FFDE
#define Vtimch7 0x0000FFE0
#define Vtimch6 0x0000FFE2
#define Vtimch5 0x0000FFE4
#define Vtimch4 0x0000FFE6
#define Vtimch3 0x0000FFE8
#define Vtimch2 0x0000FFEA
#define Vtimch1 0x0000FFEC
#define Vtimch0 0x0000FFEE
#define Vrti 0x0000FFF0
#define Virq 0x0000FFF2
#define Vxirq 0x0000FFF4
#define Vswi 0x0000FFF6
#define Vtrap 0x0000FFF8
#define Vcop 0x0000FFFA
#define Vclkmon 0x0000FFFC
#define Vreset 0x0000FFFE
/**************** registers I/O map ****************/
/*** PORTA - Port A Register; 0x00000000 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Port A Bit 0 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} PORTASTR;
extern volatile PORTASTR _PORTA @(REG_BASE + 0x00000000);
#define PORTA _PORTA.Byte
#define PORTA_BIT0 _PORTA.Bits.BIT0
#define PORTA_BIT0_MASK 1
/*** PORTB - Port B Register; 0x00000001 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT4 :1; /* Port B Bit 4 */
byte :1;
byte :1;
byte :1;
} Bits;
} PORTBSTR;
extern volatile PORTBSTR _PORTB @(REG_BASE + 0x00000001);
#define PORTB _PORTB.Byte
#define PORTB_BIT4 _PORTB.Bits.BIT4
#define PORTB_BIT4_MASK 16
/*** DDRA - Port A Data Direction Register; 0x00000002 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Data Direction Port A Bit 0 */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} DDRASTR;
extern volatile DDRASTR _DDRA @(REG_BASE + 0x00000002);
#define DDRA _DDRA.Byte
#define DDRA_BIT0 _DDRA.Bits.BIT0
#define DDRA_BIT0_MASK 1
/*** DDRB - Port B Data Direction Register; 0x00000003 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT4 :1; /* Data Direction Port B Bit 4 */
byte :1;
byte :1;
byte :1;
} Bits;
} DDRBSTR;
extern volatile DDRBSTR _DDRB @(REG_BASE + 0x00000003);
#define DDRB _DDRB.Byte
#define DDRB_BIT4 _DDRB.Bits.BIT4
#define DDRB_BIT4_MASK 16
/*** PORTE - Port E Register; 0x00000008 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Port E Bit 0 */
byte BIT1 :1; /* Port E Bit 1 */
byte :1;
byte :1;
byte BIT4 :1; /* Port E Bit 4 */
byte :1;
byte :1;
byte BIT7 :1; /* Port E Bit 7 */
} Bits;
struct {
byte grpBIT :2;
byte :1;
byte :1;
byte grpBIT_4 :1;
byte :1;
byte :1;
byte grpBIT_7 :1;
} MergedBits;
} PORTESTR;
extern volatile PORTESTR _PORTE @(REG_BASE + 0x00000008);
#define PORTE _PORTE.Byte
#define PORTE_BIT0 _PORTE.Bits.BIT0
#define PORTE_BIT1 _PORTE.Bits.BIT1
#define PORTE_BIT4 _PORTE.Bits.BIT4
#define PORTE_BIT7 _PORTE.Bits.BIT7
#define PORTE_BIT _PORTE.MergedBits.grpBIT
#define PORTE_BIT0_MASK 1
#define PORTE_BIT1_MASK 2
#define PORTE_BIT4_MASK 16
#define PORTE_BIT7_MASK 128
#define PORTE_BIT_MASK 3
#define PORTE_BIT_BITNUM 0
/*** DDRE - Port E Data Direction Register; 0x00000009 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT4 :1; /* Data Direction Port E Bit 4 */
byte :1;
byte :1;
byte BIT7 :1; /* Data Direction Port E Bit 7 */
} Bits;
} DDRESTR;
extern volatile DDRESTR _DDRE @(REG_BASE + 0x00000009);
#define DDRE _DDRE.Byte
#define DDRE_BIT4 _DDRE.Bits.BIT4
#define DDRE_BIT7 _DDRE.Bits.BIT7
#define DDRE_BIT4_MASK 16
#define DDRE_BIT7_MASK 128
/*** PEAR - Port E Assignment Register; 0x0000000A ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte NECLK :1; /* No External E Clock */
byte :1;
byte :1;
byte NOACCE :1; /* CPU No Access Output Enable */
} Bits;
} PEARSTR;
extern volatile PEARSTR _PEAR @(REG_BASE + 0x0000000A);
#define PEAR _PEAR.Byte
#define PEAR_NECLK _PEAR.Bits.NECLK
#define PEAR_NOACCE _PEAR.Bits.NOACCE
#define PEAR_NECLK_MASK 16
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