📄 mc9s08dz60.h
字号:
#define ADCVH_ADCV_8 _ADCV.Overlap_STR.ADCVHSTR.MergedBits.grpADCV_8
#define ADCVH_ADCV ADCVH_ADCV_8
#define ADCVH_ADCV8_MASK 1
#define ADCVH_ADCV9_MASK 2
#define ADCVH_ADCV_8_MASK 3
#define ADCVH_ADCV_8_BITNUM 0
/*** ADCVL - Compare Value Register Low; 0x00000015 ***/
union {
byte Byte;
struct {
byte ADCV0 :1; /* Compare Function Value 0 */
byte ADCV1 :1; /* Compare Function Value 1 */
byte ADCV2 :1; /* Compare Function Value 2 */
byte ADCV3 :1; /* Compare Function Value 3 */
byte ADCV4 :1; /* Compare Function Value 4 */
byte ADCV5 :1; /* Compare Function Value 5 */
byte ADCV6 :1; /* Compare Function Value 6 */
byte ADCV7 :1; /* Compare Function Value 7 */
} Bits;
} ADCVLSTR;
#define ADCVL _ADCV.Overlap_STR.ADCVLSTR.Byte
#define ADCVL_ADCV0 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV0
#define ADCVL_ADCV1 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV1
#define ADCVL_ADCV2 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV2
#define ADCVL_ADCV3 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV3
#define ADCVL_ADCV4 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV4
#define ADCVL_ADCV5 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV5
#define ADCVL_ADCV6 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV6
#define ADCVL_ADCV7 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV7
#define ADCVL_ADCV0_MASK 1
#define ADCVL_ADCV1_MASK 2
#define ADCVL_ADCV2_MASK 4
#define ADCVL_ADCV3_MASK 8
#define ADCVL_ADCV4_MASK 16
#define ADCVL_ADCV5_MASK 32
#define ADCVL_ADCV6_MASK 64
#define ADCVL_ADCV7_MASK 128
} Overlap_STR;
} ADCVSTR;
extern volatile ADCVSTR _ADCV @0x00000014;
#define ADCV _ADCV.Word
/*** ADCFG - Configuration Register; 0x00000016 ***/
typedef union {
byte Byte;
struct {
byte ADICLK0 :1; /* Input Clock Select Bit 0 */
byte ADICLK1 :1; /* Input Clock Select Bit 1 */
byte MODE0 :1; /* Conversion Mode Selection Bit 0 */
byte MODE1 :1; /* Conversion Mode Selection Bit 1 */
byte ADLSMP :1; /* Long Sample Time Configuration */
byte ADIV0 :1; /* Clock Divide Select Bit 0 */
byte ADIV1 :1; /* Clock Divide Select Bit 1 */
byte ADLPC :1; /* Low Power Configuration */
} Bits;
struct {
byte grpADICLK :2;
byte grpMODE :2;
byte :1;
byte grpADIV :2;
byte :1;
} MergedBits;
} ADCFGSTR;
extern volatile ADCFGSTR _ADCFG @0x00000016;
#define ADCFG _ADCFG.Byte
#define ADCFG_ADICLK0 _ADCFG.Bits.ADICLK0
#define ADCFG_ADICLK1 _ADCFG.Bits.ADICLK1
#define ADCFG_MODE0 _ADCFG.Bits.MODE0
#define ADCFG_MODE1 _ADCFG.Bits.MODE1
#define ADCFG_ADLSMP _ADCFG.Bits.ADLSMP
#define ADCFG_ADIV0 _ADCFG.Bits.ADIV0
#define ADCFG_ADIV1 _ADCFG.Bits.ADIV1
#define ADCFG_ADLPC _ADCFG.Bits.ADLPC
#define ADCFG_ADICLK _ADCFG.MergedBits.grpADICLK
#define ADCFG_MODE _ADCFG.MergedBits.grpMODE
#define ADCFG_ADIV _ADCFG.MergedBits.grpADIV
#define ADCFG_ADICLK0_MASK 1
#define ADCFG_ADICLK1_MASK 2
#define ADCFG_MODE0_MASK 4
#define ADCFG_MODE1_MASK 8
#define ADCFG_ADLSMP_MASK 16
#define ADCFG_ADIV0_MASK 32
#define ADCFG_ADIV1_MASK 64
#define ADCFG_ADLPC_MASK 128
#define ADCFG_ADICLK_MASK 3
#define ADCFG_ADICLK_BITNUM 0
#define ADCFG_MODE_MASK 12
#define ADCFG_MODE_BITNUM 2
#define ADCFG_ADIV_MASK 96
#define ADCFG_ADIV_BITNUM 5
/*** APCTL1 - ADC Pin Control 1 Register; 0x00000017 ***/
typedef union {
byte Byte;
struct {
byte ADPC0 :1; /* ADC Pin Control 0 */
byte ADPC1 :1; /* ADC Pin Control 1 */
byte ADPC2 :1; /* ADC Pin Control 2 */
byte ADPC3 :1; /* ADC Pin Control 3 */
byte ADPC4 :1; /* ADC Pin Control 4 */
byte ADPC5 :1; /* ADC Pin Control 5 */
byte ADPC6 :1; /* ADC Pin Control 6 */
byte ADPC7 :1; /* ADC Pin Control 7 */
} Bits;
} APCTL1STR;
extern volatile APCTL1STR _APCTL1 @0x00000017;
#define APCTL1 _APCTL1.Byte
#define APCTL1_ADPC0 _APCTL1.Bits.ADPC0
#define APCTL1_ADPC1 _APCTL1.Bits.ADPC1
#define APCTL1_ADPC2 _APCTL1.Bits.ADPC2
#define APCTL1_ADPC3 _APCTL1.Bits.ADPC3
#define APCTL1_ADPC4 _APCTL1.Bits.ADPC4
#define APCTL1_ADPC5 _APCTL1.Bits.ADPC5
#define APCTL1_ADPC6 _APCTL1.Bits.ADPC6
#define APCTL1_ADPC7 _APCTL1.Bits.ADPC7
#define APCTL1_ADPC0_MASK 1
#define APCTL1_ADPC1_MASK 2
#define APCTL1_ADPC2_MASK 4
#define APCTL1_ADPC3_MASK 8
#define APCTL1_ADPC4_MASK 16
#define APCTL1_ADPC5_MASK 32
#define APCTL1_ADPC6_MASK 64
#define APCTL1_ADPC7_MASK 128
/*** APCTL2 - ADC Pin Control 2 Register; 0x00000018 ***/
typedef union {
byte Byte;
struct {
byte ADPC8 :1; /* ADC Pin Control 8 */
byte ADPC9 :1; /* ADC Pin Control 9 */
byte ADPC10 :1; /* ADC Pin Control 10 */
byte ADPC11 :1; /* ADC Pin Control 11 */
byte ADPC12 :1; /* ADC Pin Control 12 */
byte ADPC13 :1; /* ADC Pin Control 13 */
byte ADPC14 :1; /* ADC Pin Control 14 */
byte ADPC15 :1; /* ADC Pin Control 15 */
} Bits;
} APCTL2STR;
extern volatile APCTL2STR _APCTL2 @0x00000018;
#define APCTL2 _APCTL2.Byte
#define APCTL2_ADPC8 _APCTL2.Bits.ADPC8
#define APCTL2_ADPC9 _APCTL2.Bits.ADPC9
#define APCTL2_ADPC10 _APCTL2.Bits.ADPC10
#define APCTL2_ADPC11 _APCTL2.Bits.ADPC11
#define APCTL2_ADPC12 _APCTL2.Bits.ADPC12
#define APCTL2_ADPC13 _APCTL2.Bits.ADPC13
#define APCTL2_ADPC14 _APCTL2.Bits.ADPC14
#define APCTL2_ADPC15 _APCTL2.Bits.ADPC15
#define APCTL2_ADPC8_MASK 1
#define APCTL2_ADPC9_MASK 2
#define APCTL2_ADPC10_MASK 4
#define APCTL2_ADPC11_MASK 8
#define APCTL2_ADPC12_MASK 16
#define APCTL2_ADPC13_MASK 32
#define APCTL2_ADPC14_MASK 64
#define APCTL2_ADPC15_MASK 128
/*** APCTL3 - ADC Pin Control 3 Register; 0x00000019 ***/
typedef union {
byte Byte;
struct {
byte ADPC16 :1; /* ADC Pin Control 16 */
byte ADPC17 :1; /* ADC Pin Control 17 */
byte ADPC18 :1; /* ADC Pin Control 18 */
byte ADPC19 :1; /* ADC Pin Control 19 */
byte ADPC20 :1; /* ADC Pin Control 20 */
byte ADPC21 :1; /* ADC Pin Control 21 */
byte ADPC22 :1; /* ADC Pin Control 22 */
byte ADPC23 :1; /* ADC Pin Control 23 */
} Bits;
} APCTL3STR;
extern volatile APCTL3STR _APCTL3 @0x00000019;
#define APCTL3 _APCTL3.Byte
#define APCTL3_ADPC16 _APCTL3.Bits.ADPC16
#define APCTL3_ADPC17 _APCTL3.Bits.ADPC17
#define APCTL3_ADPC18 _APCTL3.Bits.ADPC18
#define APCTL3_ADPC19 _APCTL3.Bits.ADPC19
#define APCTL3_ADPC20 _APCTL3.Bits.ADPC20
#define APCTL3_ADPC21 _APCTL3.Bits.ADPC21
#define APCTL3_ADPC22 _APCTL3.Bits.ADPC22
#define APCTL3_ADPC23 _APCTL3.Bits.ADPC23
#define APCTL3_ADPC16_MASK 1
#define APCTL3_ADPC17_MASK 2
#define APCTL3_ADPC18_MASK 4
#define APCTL3_ADPC19_MASK 8
#define APCTL3_ADPC20_MASK 16
#define APCTL3_ADPC21_MASK 32
#define APCTL3_ADPC22_MASK 64
#define APCTL3_ADPC23_MASK 128
/*** IRQSC - Interrupt Request Status and Control Register; 0x0000001C ***/
typedef union {
byte Byte;
struct {
byte IRQMOD :1; /* IRQ Detection Mode */
byte IRQIE :1; /* IRQ Interrupt Enable */
byte IRQACK :1; /* IRQ Acknowledge */
byte IRQF :1; /* IRQ Flag */
byte IRQPE :1; /* IRQ Pin Enable */
byte IRQEDG :1; /* Interrupt Request (IRQ) Edge Select */
byte IRQPDD :1; /* Interrupt Request (IRQ) Pull Device Disable */
byte :1;
} Bits;
} IRQSCSTR;
extern volatile IRQSCSTR _IRQSC @0x0000001C;
#define IRQSC _IRQSC.Byte
#define IRQSC_IRQMOD _IRQSC.Bits.IRQMOD
#define IRQSC_IRQIE _IRQSC.Bits.IRQIE
#define IRQSC_IRQACK _IRQSC.Bits.IRQACK
#define IRQSC_IRQF _IRQSC.Bits.IRQF
#define IRQSC_IRQPE _IRQSC.Bits.IRQPE
#define IRQSC_IRQEDG _IRQSC.Bits.IRQEDG
#define IRQSC_IRQPDD _IRQSC.Bits.IRQPDD
#define IRQSC_IRQMOD_MASK 1
#define IRQSC_IRQIE_MASK 2
#define IRQSC_IRQACK_MASK 4
#define IRQSC_IRQF_MASK 8
#define IRQSC_IRQPE_MASK 16
#define IRQSC_IRQEDG_MASK 32
#define IRQSC_IRQPDD_MASK 64
/*** TPM1SC - TPM 1 Status and Control Register; 0x00000020 ***/
typedef union {
byte Byte;
struct {
byte PS0 :1; /* Prescale Divisor Select Bit 0 */
byte PS1 :1; /* Prescale Divisor Select Bit 1 */
byte PS2 :1; /* Prescale Divisor Select Bit 2 */
byte CLKSA :1; /* Clock Source Select A */
byte CLKSB :1; /* Clock Source Select B */
byte CPWMS :1; /* Center-Aligned PWM Select */
byte TOIE :1; /* Timer Overflow Interrupt Enable */
byte TOF :1; /* Timer Overflow Flag */
} Bits;
struct {
byte grpPS :3;
byte grpCLKSx :2;
byte :1;
byte :1;
byte :1;
} MergedBits;
} TPM1SCSTR;
extern volatile TPM1SCSTR _TPM1SC @0x00000020;
#define TPM1SC _TPM1SC.Byte
#define TPM1SC_PS0 _TPM1SC.Bits.PS0
#define TPM1SC_PS1 _TPM1SC.Bits.PS1
#define TPM1SC_PS2 _TPM1SC.Bits.PS2
#define TPM1SC_CLKSA _TPM1SC.Bits.CLKSA
#define TPM1SC_CLKSB _TPM1SC.Bits.CLKSB
#define TPM1SC_CPWMS _TPM1SC.Bits.CPWMS
#define TPM1SC_TOIE _TPM1SC.Bits.TOIE
#define TPM1SC_TOF _TPM1SC.Bits.TOF
#define TPM1SC_PS _TPM1SC.MergedBits.grpPS
#define TPM1SC_CLKSx _TPM1SC.MergedBits.grpCLKSx
#define TPM1SC_PS0_MASK 1
#define TPM1SC_PS1_MASK 2
#define TPM1SC_PS2_MASK 4
#define TPM1SC_CLKSA_MASK 8
#define TPM1SC_CLKSB_MASK 16
#define TPM1SC_CPWMS_MASK 32
#define TPM1SC_TOIE_MASK 64
#define TPM1SC_TOF_MASK 128
#define TPM1SC_PS_MASK 7
#define TPM1SC_PS_BITNUM 0
#define TPM1SC_CLKSx_MASK 24
#define TPM1SC_CLKSx_BITNUM 3
/*** TPM1CNT - TPM 1 Counter Register; 0x00000021 ***/
typedef union {
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -