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📄 str71x_os_2.s

📁 ucos_ii在str710f2z6上的移植及串口驱动(包含了fifo)源代码。其中“读我。txt”文件中有移植时做的简单笔记。希望对需要的初学者有所帮助。
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                LDR     R1, =APB1_BASE
                LDR     R2, =APB2_BASE
                LDR     R3, =APB1_Mask
                LDR     R4, =APB2_Mask
                STRH    R3, [R1, #CKDIS_OFS]   ; Disable Clock for APB1 periph.
                STRH    R4, [R2, #CKDIS_OFS]   ; Disable Clock for APB2 periph.
                STRH    R3, [R1, #SWRES_OFS]   ; Keep under Reset APB1 periph.
                STRH    R4, [R2, #SWRES_OFS]   ; Keep under Reset APB2 periph.
                MOV     R0, #10
PR_Loop1        SUBS    R0, R0, #1             ; Wait that selected macrocells
                BNE     PR_Loop1               ; enter reset
                STRH    R0, [R1, #SWRES_OFS]   ; Release Reset of APB1 periph.
                STRH    R0, [R2, #SWRES_OFS]   ; Relase Reset of APB2 periph.
                STRH    R0, [R1, #CKDIS_OFS]   ; Enable Clock for APB1 periph.
                STRH    R0, [R2, #CKDIS_OFS]   ; Enable Clock for APB2 periph.
                MOV     R0, #10
PR_Loop2        SUBS    R0, R0, #1             ; Wait that selected macrocells
                BNE     PR_Loop2               ; exit from reset
                ENDIF


; Setup External Memory Interface (EMI)
                IF      EMI_SETUP <> 0
                LDR     R0, =GPIO2_BASE        ; Configure P2.0..7 for Ext. Bus
                LDR     R1, [R0, #PC0_OFS]
                ORR     R1, R1, #0x0000000F
                STR     R1, [R0, #PC0_OFS]
                LDR     R1, [R0, #PC1_OFS]
                ORR     R1, R1, #0x0000000F
                STR     R1, [R0, #PC1_OFS]
                LDR     R1, [R0, #PC2_OFS]
                ORR     R1, R1, #0x0000000F
                STR     R1, [R0, #PC2_OFS]

                LDR     R0, =EMI_BASE          ; Configure EMI
                LDR     R1, =BCON0_Val
                STR     R1, [R0, #BCON0_OFS]
                LDR     R1, =BCON1_Val
                STR     R1, [R0, #BCON1_OFS]
                LDR     R1, =BCON2_Val
                STR     R1, [R0, #BCON2_OFS]
                LDR     R1, =BCON3_Val
                STR     R1, [R0, #BCON3_OFS]
                ENDIF


; Setup Enhanced Interrupt Controller
                IF      EIC_SETUP <> 0
                LDR     R0, =EIC_BASE
                LDR     R1, =0xE59F0000     ; LDR PC,[PC,#ofs] (High 16-bits)
                STR     R1, [R0, #IVR_OFS]  ; Store into IVR[31:16]
                LDR     R1, =T0TIMI_Addr    ; IRQ Address Table
                LDR     R2, =0x0FFF         ; Offset Mask
                AND     R1, R1, R2          ; Mask Offset
                LDR     R2, =0xF7E0         ; Jump Offset = 0x07E0
                                            ; 0xFXXX is used to complete the
                                            ; LDR PC,[PC,#ofs]
                                            ; 0x07E0 = 0x07E8 - 8 (Prefetch)
                                            ; 0 = IVR Address + 0x7E8
                ADD     R1, R1, R2          ; Add Jump Offset
                MOV     R2, #32             ; Number of Channels
                MOV     R3, #SIR0_OFS       ; Offset to SIR0
EIC_Loop        MOV     R4, R1, LSL #16     ; Use High 16-bits
                STR     R4, [R0, R3]        ; Store into SIRx
                ADD     R1, R1, #4          ; Next IRQ Address
                ADD     R3, R3, #4          ; Next SIRx
                SUBS    R2, R2, #1          ; Decrement Counter
                BNE     EIC_Loop                               
                ENDIF


; Memory Remapping
BOOTCR          EQU     0xA0000050          ; Boot Configuration Register
FLASH_BM        EQU     0x01                ; Boot Mode: Flash at 0
RAM_BM          EQU     0x02                ; Boot Mode: RAM at 0
EXTMEM_BM       EQU     0x03                ; Boot Mode: EXTMEM at 0

                IF      :DEF:REMAP
                MOV     R1, #FLASH_BM
                IF      :DEF:EXTMEM_MODE
                MOV     R1, #EXTMEM_BM
                ENDIF
                IF      :DEF:RAM_MODE
                MOV     R1, #RAM_BM
                ENDIF
                LDR     R0, =BOOTCR
                LDRH    R2, [R0]            ; Read BOOTCR
                BIC     R2, R2, #0x03       ; Clear two LSB bits
                ORR     R2, R2, R1          ; Setup two LSB bits
                STRH    R2, [R0]            ; Write BOOTCR
                ENDIF


; Setup Stack for each mode

                LDR     R0, =Stack_Top

;  Enter Undefined Instruction Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit
                MOV     SP, R0
                SUB     R0, R0, #UND_Stack_Size

;  Enter Abort Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit
                MOV     SP, R0
                SUB     R0, R0, #ABT_Stack_Size

;  Enter FIQ Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit
                MOV     SP, R0
                SUB     R0, R0, #FIQ_Stack_Size

;  Enter IRQ Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit
                MOV     SP, R0
                SUB     R0, R0, #IRQ_Stack_Size

;  Enter Supervisor Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit
                MOV     SP, R0
                SUB     R0, R0, #SVC_Stack_Size

;  Enter User Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_USR
                MOV     SP, R0
                SUB     SL, SP, #USR_Stack_Size


; Enter the C code

                IMPORT  __main
                LDR     R0, =__main
                BX      R0


; User Initial Stack & Heap
                AREA    |.text|, CODE, READONLY

                IMPORT  __use_two_region_memory
                EXPORT  __user_initial_stackheap
__user_initial_stackheap

                LDR     R0, =  Heap_Mem
                LDR     R1, =(Stack_Mem + USR_Stack_Size)
                LDR     R2, = (Heap_Mem +      Heap_Size)
                LDR     R3, = Stack_Mem
                BX      LR
;=======================================================================
;*******************************************************************************
;                         Exception Handlers
;*******************************************************************************

;*******************************************************************************
;* Macro Name     : SaveContext
;* Description    : This macro used to save the context before entering
;                   an exception handler.
;* Input          : The range of registers to store.
;* Output         : none
;*******************************************************************************

        MACRO
        SaveContext $reg1,$reg2
        STMFD  sp!,{$reg1-$reg2,lr} ; Save The workspace plus the current return
                              ; address lr_ mode into the stack.
        MRS    r1,spsr        ; Save the spsr_mode into r1.
        STMFD  sp!,{r1}       ; Save spsr.
        MEND

;*******************************************************************************
;* Macro Name     : RestoreContext
;* Description    : This macro used to restore the context to return from
;                   an exception handler and continue the program execution.
;* Input          : The range of registers to restore.
;* Output         : none
;*******************************************************************************

        MACRO
        RestoreContext $reg1,$reg2
        LDMFD   sp!,{r1}        ; Restore the saved spsr_mode into r1.
        MSR     spsr_cxsf,r1    ; Restore spsr_mode.
        LDMFD   sp!,{$reg1-$reg2,pc}^; Return to the instruction following...
                                ; ...the exception interrupt.
        MEND

;*******************************************************************************
;* Function Name  : UndefinedHandler
;* Description    : This function called when undefined instruction
;                   exception is entered.
;* Input          : none
;* Output         : none
;*******************************************************************************

UndefinedHandler
        SaveContext r0,r12    ; Save the workspace plus the current
                              ; return address lr_ und and spsr_und.
        BL      Undefined_Handler; Branch to Undefined_Handler.
        RestoreContext r0,r12 ; Return to the instruction following...
                              ; ...the undefined instruction.

;*******************************************************************************
;* Function Name  : SWIHandler
;* Description    : This function called when SWI instruction executed.
;* Input          : none
;* Output         : none
;*******************************************************************************

SWIHandler
        SaveContext r0,r12    ; Save the workspace plus the current
                              ; return address lr_ svc and spsr_svc.
        BL       SWI_Handler  ; Branch to SWI_Handler.
        RestoreContext r0,r12 ; Return to the instruction following...
                              ; ...the SWI instruction.

;*******************************************************************************
;* Function Name  : PrefetchAbortHandler
;* Description    : This function called when Prefetch Abort
;                   exception is entered.
;* Input          : none
;* Output         : none
;*******************************************************************************

PrefetchAbortHandler
        SUB    lr,lr,#4       ; Update the link register.
        SaveContext r0,r12    ; Save the workspace plus the current
                              ; return address lr_abt and spsr_abt.
        BL     Prefetch_Handler; Branch to Prefetch_Handler.
        RestoreContext r0,r12 ; Return to the instruction following that...
                              ; ...has generated the prefetch abort exception.

;*******************************************************************************
;* Function Name  : DataAbortHandler
;* Description    : This function is called when Data Abort
;                   exception is entered.
;* Input          : none
;* Output         : none
;*******************************************************************************

DataAbortHandler
        SUB    lr,lr,#8       ; Update the link register.
        SaveContext r0,r12    ; Save the workspace plus the current
                              ; return address lr_ abt and spsr_abt.
        BL     Abort_Handler  ; Branch to Abort_Handler.
        RestoreContext r0,r12 ; Return to the instruction following that...
                              ; ...has generated the data abort exception.

;*******************************************************************************
;* Macro Name     : IRQ_to_SYS
;* Description    : This macro used to switch form IRQ mode to SYS mode
;* Input          : none.
;* Output         : none
;*******************************************************************************
       MACRO
       IRQ_to_SYS
        MSR    cpsr_c,#0x1F   ; Switch to SYS mode
        STMFD  sp!,{lr}       ; Save the link register.
       MEND
;*******************************************************************************
;* Macro Name     : SYS_to_IRQ
;* Description    : This macro used to switch from SYS mode to IRQ mode
;                   then to return to IRQHnadler routine.
;* Input          : none.
;* Output         : none.
;*******************************************************************************
       MACRO
        SYS_to_IRQ
        LDMFD  sp!,{lr}      ; Restore the link register.
        MSR    cpsr_c,#0xD2  ; Switch to IRQ mode.
        MOV    pc,lr         ; Return to IRQHandler routine to clear the
                             ; pending bit.
       MEND
;*******************************************************************************
;* Function Name  : T0TIMIIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;                   the T0TIMI_IRQHandler function located in 71x_it.c.
;                   Then to return to IRQ mode after the
;                   T0TIMI_IRQHandler function termination.
;* Input          : none.
;* Output         : none.
;*******************************************************************************
T0TIMIIRQHandler
        IRQ_to_SYS
        BL     T0TIMI_IRQHandler
        SYS_to_IRQ
;*******************************************************************************
;* Function Name  : FLASHIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;                   the FLASH_IRQHandler function located in 71x_it.c.
;                   Then to return to IRQ mode after the
;                   FLASH_IRQHandler function termination.
;* Input          : none
;* Output         : none
;*******************************************************************************
FLASHIRQHandler
        IRQ_to_SYS
        BL     FLASH_IRQHandler
        SYS_to_IRQ
;*******************************************************************************
;* Function Name  : RCCUIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;                   the RCCU_IRQHandler function located in 71x_it.c.
;                   Then to return to IRQ mode after the
;                   RCCU_IRQHandler function termination.
;* Input          : none
;* Output         : none
;*******************************************************************************
RCCUIRQHandler
        IRQ_to_SYS
        BL     RCCU_IRQHandler
        SYS_to_IRQ
;*******************************************************************************
;* Function Name  : RTCIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;                   the RTC_IRQHandler function located in 71x_it.c.
;                   Then to return to IRQ mode after the
;                   RTC_IRQHandler function termination.
;* Input          : none

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