71x_init.s

ucos_ii在str710f2z6上的移植及串口驱动（包含了fifo）源代码。其中“读我。txt”文件中有移植时做的简单笔记。希望对需要的初学者有所帮助。

                                       ; LDR pc,[pc,#offset] opcode (0xE59FFXXX)
        ADD     r1,r4,r1               ; Compute the jump offset from IVR to the
                                       ; IRQ table entry.
EIC_INI MOV     r4, r1, LSL #16        ; Left shift the result
        STR     r4, [r3, r5]           ; Store the result in SIRx register
        ADD     r1, r1, #4             ; Next IRQ address
        ADD     r5, r5, #4             ; Next SIR
        SUBS    r2, r2, #1             ; Decrement the number of SIR registers
                                       ; to initialize
        BNE     EIC_INI                ; If more then continue
        MEND
;*******************************************************************************
;* Macro Name     : PERIPHERAL_INIT
;* Description    : This macro reset all device peripherals.
;* Input          : None.
;* Output         : None.
;*******************************************************************************
        MACRO   
        PERIPHERAL_INIT
        LDR     r1, =APB1_base_addr      ; r0= APB1 base address
        LDR     r2, =APB2_base_addr      ; r0= APB2 base address
        LDR     r0, =CKDIS1_config_all
        STRH    r0, [r1, #CKDIS_off_addr]; Clock Disabling for all APB1 peripherals
        LDR     r0, =CKDIS2_config_all
        STRH    r0, [r2, #CKDIS_off_addr]; Clock Disabling for all APB2 peripherals
        LDR     r0, =SWRES1_config_all
        STRH    r0, [r1, #SWRES_off_addr]; Keep all APB1 peripherals under reset 
        LDR     r0, =SWRES2_config_all
        STRH    r0, [r2, #SWRES_off_addr]; Keep all APB2 peripherals under reset 
        MOV     r7, #10                  ; Wait that the selected macrocells exit from reset
loop1   SUBS    r7, r7, #1
        BNE     loop1
        MOV     r0, #0
        STRH    r0, [r1, #SWRES_off_addr]; Enable all all APB1 peripherals
        STRH    r0, [r2, #SWRES_off_addr]; Enable all all APB2 peripherals
        STRH    r0, [r1, #CKDIS_off_addr]; Clock Enabling for all APB1 peripherals
        STRH    r0, [r2, #CKDIS_off_addr]; Clock Enabling for all APB2 peripherals
        MOV     r7, #10                  ; Wait that the selected macrocells exit from reset
loop2   SUBS    r7, r7, #1
        BNE     loop2
        MEND

; define remapping
; If you need to remap memory before entring the main program
; uncomment next ligne
;            GBLL  remapping

; Then define which memory to remap to address 0x00000000
;  Uncomment next line if you want to remap RAM
;            GBLL  remap_ram

;  Uncomment next line if you want to remap FLASH
;            GBLL  remap_flash

;  Uncomment next line if you want to remap the external memory
;            GBLL  remap_ext
		PRESERVE8
            AREA    |.text|,CODE

            CODE32
         ;       ARM

        ;ENTRY

        EXPORT  Reset_Handler
        IMPORT  T0TIMI_Addr
Reset_Handler
         LDR     pc, =NextInst
NextInst
		NOP		; Wait for OSC stabilization
		NOP
		NOP
		NOP
		NOP
		NOP
		NOP
		NOP
		NOP

        MSR     CPSR_c, #Mode_ABT:OR:F_Bit:OR:I_Bit
        LDR     SP, =ABT_Stack

        MSR     CPSR_c, #Mode_UNDEF:OR:F_Bit:OR:I_Bit
        LDR     SP,= UNDEF_Stack

        MSR     CPSR_c, #Mode_SVC:OR:F_Bit:OR:I_Bit
        LDR     SP, =RAM_Limit
   
        
; Uncomment next ligne if you need to reset all device pripherals
;       PERIPHERAL_INIT           ; Reset all device peripherals

; Uncomment next ligne if you need to enable the EMI Bank 1
;       EMI_INIT                  ; Initialize EIM Bank 1

;Uncomment next ligne if you need to initialize the EIC
        EIC_INIT                  ; Initialize EIC
;******************************************************************************


;REMAPPING
;Description  : Remapping  memory whether RAM,FLASH or External memory
;               at Address 0x0 after the application has started executing.
;               Remapping is generally done to allow RAM  to replace FLASH
;               or EXTMEM at 0x00000000.
;               the remapping of RAM allow copying of vector table into RAM
;               To enable the memory remapping uncomment: (see above)
;               GBLL  remapping to enable memory remapping
;                  AND
;               GBLL  remap_ram to remap RAM
;                  OR
;               GBLL  remap_flash to remap FLASH
;                  OR
;               GBLL  remap_ext to remap External memory Bank0
;******************************************************************************
  IF :DEF: remapping
    IF :DEF: remap_flash
        MOV     r0, #FLASH_mask
    ENDIF
    IF :DEF: remap_ram
        MOV     r0, #RAM_mask
    ENDIF
    IF :DEF: remap_ext
        MOV     r0, #EXTMEM_mask
    ENDIF
        LDR     r1, =CPM_Base_addr
        LDRH    r2, [r1, #BOOTCR_off_addr]; Read BOOTCR Register
        BIC     r2, r2, #0x03             ; Reset the two LSB bits of BOOTCR
        ORR     r2, r2, r0                ; change the two LSB bits of BOOTCR
        STRH    r2, [r1, #BOOTCR_off_addr]; Write BOOTCR Register
  ENDIF

       	MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit; Change to FIQ mode
        LDR     SP, =FIQ_Stack            ; Initialize FIQ stack pointer

       	MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit; Change to IRQ mode
        LDR     SP, =IRQ_Stack            ; Initialize IRQ stack pointer

        ;MSR     CPSR_c, #Mode_USR; Change to User mode, Enable IRQ and FIQ
        ;LDR     SP, =USR_Stack            ; Initialize USR stack pointer
        

		MSR     CPSR_c, #Mode_SYS:OR:F_Bit:OR:I_Bit; Change to System mode
        LDR     SP, =USR_Stack            ; Initialize USR stack pointer


        MSR     CPSR_c, #Mode_SYS         ; Enable IRQ and FIQ
        
        
		
        IMPORT  __main

; --- Now branches to a C lib function that copies RO data from their
;     load region to their execute region, create the RW and ZI regions
;     then jumps to user C main program.

       ; B       __main   ; Note : use B not BL, because an application will
                         ; never return this way
		LDR     R0, =__main
                BX      R0


		 AREA    |.text|, CODE, READONLY

                IMPORT  __use_two_region_memory
                EXPORT  __user_initial_stackheap
__user_initial_stackheap

                LDR     R0, =  Heap_Mem
                LDR     R1, =(Stack_Mem + USR_Stack)
                LDR     R2, = (Heap_Mem +      Heap_Size)
                LDR     R3, = Stack_Mem
                BX      LR



        LTORG
        
        END
;******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****