📄 os_cpu_a_2.s
字号:
;********************************************************************************************************
; uC/OS-II
; The Real-Time Kernel
;
; (c) Copyright 1992-2004, Micrium, Weston, FL
; All Rights Reserved
;
; Generic ARM Port
;
; File : OS_CPU_A.ASM
; Version : V1.60
; By : Jean J. Labrosse
;
; For : ARM7 or ARM9
; Mode : ARM or Thumb
; Toolchain : ARM Developer Suite Version 1.2 and higher
;********************************************************************************************************
IMPORT OSRunning ; External references
IMPORT OSPrioCur
IMPORT OSPrioHighRdy
IMPORT OSTCBCur
IMPORT OSTCBHighRdy
IMPORT OSIntNesting
IMPORT OSIntExit
IMPORT OSTaskSwHook
IMPORT OSTimeTick
IMPORT FIQ_Handler
;IMPORT irq_fiq_off
IMPORT xu_OS_CPU_SR_Save
IMPORT xu_OS_CPU_SR_Restore
EXPORT OS_CPU_SR_Save ; Functions declared in this file
EXPORT OS_CPU_SR_Restore
EXPORT OSStartHighRdy
EXPORT OSCtxSw
EXPORT OSIntCtxSw
EXPORT OS_CPU_IRQ_ISR
EXPORT OS_CPU_FIQ_ISR
PRESERVE8
AREA |.text|,CODE
CODE32
NO_INT EQU 0xC0 ; Mask used to disable interrupts (Both FIR and IRQ)
FIQ32_MODE EQU 0x11
IRQ32_MODE EQU 0x12
SVC32_MODE EQU 0x13
;*********************************************************************************************************
; CRITICAL SECTION METHOD 3 FUNCTIONS
;
; Description: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
; would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
; disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
; disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
; into the CPU's status register.
;
; Prototypes : OS_CPU_SR OS_CPU_SR_Save(void);
; void OS_CPU_SR_Restore(OS_CPU_SR cpu_sr);
;
;
; Note(s) : 1) These functions are used in general like this:
;
; void Task (void *p_arg)
; {
; #if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
; OS_CPU_SR cpu_sr;
; #endif
;
; :
; :
; OS_ENTER_CRITICAL(); /* cpu_sr = OS_CPU_SaveSR(); */
; :
; :
; OS_EXIT_CRITICAL(); /* OS_CPU_RestoreSR(cpu_sr); */
; :
; :
; }
;
; 2) OS_CPU_SaveSR() is implemented as recommended by Atmel's application note:
;
; "Disabling Interrupts at Processor Level"
;*********************************************************************************************************
OS_CPU_SR_Save ;DCD xu_OS_CPU_SR_Save
;MRS R0,CPSR ; Set IRQ and FIQ bits in CPSR to disable all interrupts
;ORR R1,R0,#NO_INT
;MSR CPSR_cxsf,R1
;MRS R1,CPSR ; Confirm that CPSR contains the proper interrupt disable flags
;AND R1,R1,#NO_INT
;CMP R1,#NO_INT
;BNE OS_CPU_SR_Save ; Not properly disabled (try again)
;BX LR ; Disabled, return the original CPSR contents in R0
;====================================
MOV R7,LR
;LDR R0, =xu_OS_CPU_SR_Save
;MOV LR, PC
;BX R0
bl xu_OS_CPU_SR_Save
BX R7
;====================================
OS_CPU_SR_Restore ;DCD xu_OS_CPU_SR_Restore
MOV R7,LR
bl xu_OS_CPU_SR_Restore
BX R7
;MSR CPSR_cxsf,R0
;BX LR
;*********************************************************************************************************
; START MULTITASKING
; void OSStartHighRdy(void)
;
; Note(s) : 1) OSStartHighRdy() MUST:
; a) Call OSTaskSwHook() then,
; b) Set OSRunning to TRUE,
; c) Switch to the highest priority task.
;*********************************************************************************************************
OSStartHighRdy
;MSR CPSR_c, #(NO_INT | SVC32_MODE)
; Switch to SVC mode with IRQ and FIQ disabled
;LDR R0, =OSTaskSwHook ; OSTaskSwHook();
;MOV LR, PC
;BX R0
;LDR R4, =OSRunning ; OSRunning = TRUE
;MOV R5, #1
;STRB R5, [R4]
; SWITCH TO HIGHEST PRIORITY TASK
;LDR R4, =OSTCBHighRdy ; Get highest priority task TCB address
;LDR R4, [R4] ; get stack pointer
;LDR SP, [R4] ; switch to the new stack
;LDR R4, [SP], #4 ; pop new task's CPSR
;MSR SPSR_cxsf,R4
;LDMFD SP!, {R0-R12,LR,PC}^ ; pop new task's context
; ================================================================
BL OSTaskSwHook ; OSTaskSwHook();
LDR R4,=OSRunning
MOV R5,#1
STRB R5,[R4] ; OSRunning --> TRUE
; Switch to highest priority task
LDR R4,=OSTCBHighRdy ; Get highest priority task TCB address
LDR R4,[R4] ; Get stack pointer
LDR SP,[R4] ; Switch to the new stack
LDMFD SP!,{R4} ; Pop new task's CPSR
MSR CPSR_cxsf,R4
LDMFD SP!,{R0-R12,LR,PC} ; Pop new task's R0-R12,LR & PC
;LDR r4, =OSTCBCur
;LDR R5, =OSTCBHighRdy ; Get highest priority task TCB address
;LDR R5, [R5] ; get stack pointer
;LDR SP, [R5]
;STR r5,[r4]
;LDMFD SP!, {r4}
;MSR SPSR_c,R4
;LDMFD SP!, {r4}
;MSR CPSR_c,R4
;LDMFD SP!, {R0-R12,LR,PC}
;====================================================================
;*********************************************************************************************************
; PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
;
; Note(s) : 1) OSCtxSw() is called in SYS mode with BOTH FIQ and IRQ interrupts DISABLED
;
; 2) The pseudo-code for OSCtxSw() is:
; a) Save the current task's context onto the current task's stack
; b) OSTCBCur->OSTCBStkPtr = SP;
; c) OSTaskSwHook();
; d) OSPrioCur = OSPrioHighRdy;
; e) OSTCBCur = OSTCBHighRdy;
; f) SP = OSTCBHighRdy->OSTCBStkPtr;
; g) Restore the new task's context from the new task's stack
; h) Return to new task's code
;
; 3) Upon entry:
; OSTCBCur points to the OS_TCB of the task to suspend
; OSTCBHighRdy points to the OS_TCB of the task to resume
;*********************************************************************************************************
OSCtxSw
; SAVE CURRENT TASK'S CONTEXT
STMFD SP!, {LR} ; Push return address
STMFD SP!, {LR}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -