📄 at45db041.c
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#include <LPC214X.H>
#include "type.h"
#include "irq.h"
#include "ssp.h"
#include "at45db041.h"
uint8 timeout;
uint8 spi1_init()
{
uint8 index;
uint16 dummy;
timeout=0;
//SSPCR1 = SSPCR1_LBM;
#if USE_CS
PINSEL1 |= 0x02A8;
#else
PINSEL1 |= 0x00A8;
IODIR0 |= SPI1_SEL; /* SSEL is output */
IOSET0 |= SPI1_SEL; /* set SSEL to high */
#endif
SSPCR0 = 0x07 |1<<6 |1<<7|99<<8;
SSPCPSR = 0x12;
if ( install_irq( SPI1_INT, (void *)spi1_irq_handle ) == FALSE ){
return (FALSE);
}
for(index=0;index<8;index++) dummy=SSPDR;
SSPCR1 = SSPCR1_SSE;
//SSPIMSC = SSPIMSC_RTIM;
return TRUE;
}
uint8 b1_read(uint16 offset, uint8 *buffer, uint16 length)
{
uint16 index;
uint8 command[5];
sendchar('r');
if(offset>511) return FALSE;
command[0]=0xd4; //or 0xd4, see datasheet and fix me
command[2]=(offset>>8)&0x01;
command[3]=offset&0xff;
IOCLR0 |= SPI1_SEL;
for(index=0;index<5;index++) {
while(!(SSPSR & SSPSR_TFE));
SSPDR=command[index];
}
for(index=0;index<length;index++){
sendchar('0'+index);
while(!(SSPSR & SSPSR_RNE) && !timeout);
if(timeout) {
timeout=0;
IOSET0 |= SPI1_SEL;
return FALSE;
}
buffer[index]=SSPDR;
}
IOSET0 |= SPI1_SEL;
return TRUE;
}
uint8 b1_write(uint16 offset, uint8 *buffer, uint16 length)
{
uint16 index;
uint8 command[4];
//sendchar('w');
if(offset>511) return FALSE;
command[0]=0x84;
command[2]=(offset>>8)&0x01;
command[3]=offset&0xff;
IOCLR0 |= SPI1_SEL;
for(index=0;index<4;index++){
while(!(SSPSR & SSPSR_TFE));
SSPDR=command[index];
}
for(index=0;index<length;index++){
while(!(SSPSR & SSPSR_TFE));
SSPDR=buffer[index];
}
//while(1) SSPDR=0xaa;
IOSET0 |= SPI1_SEL;
return TRUE;
}
uint8 page_read(uint16 page, uint16 offset, uint8 *buffer, uint16 length)
{
uint16 index;
uint8 command[4];
if(offset>511) return FALSE;
command[0]=0xd2; //0x52 or 0xd2, see datasheet and fix me
command[1]=(page>>7)&0x0f;
command[2]=(page<<1)&0xfe;
command[2]|=(offset>>8)&0x01;
command[3]=offset&0xff;
IOCLR0 |= SPI1_SEL;
for(index=0;index<4;index++) {
while(!(SSPSR & SSPSR_TFE));
SSPDR=command[index];
}
for(index=0;index<4;index++) {
while(!(SSPSR & SSPSR_TFE));
SSPDR=index;
}
for(index=0;index<length;index++){
sendchar('0'+index);
while(!(SSPSR & SSPSR_RNE) && !timeout);
if(timeout) {
timeout=0;
IOSET0 |= SPI1_SEL;
return FALSE;
}
buffer[index]=SSPDR;
}
IOSET0 |= SPI1_SEL;
return TRUE;
}
uint8 status_read()
{
uint8 state;
uint8 i;
uint8 command=0xd7; //0x57 or 0xd7
IOCLR0 |= SPI1_SEL;
while (!(SSPSR & SSPSR_TNF));
SSPDR=command;
while ((SSPSR & SSPSR_BSY));
state=SSPDR;
SSPDR=0xe0;
while ((SSPSR & SSPSR_BSY));
state=SSPDR;
IOSET0 |= SPI1_SEL;
return state;
}
void spi1_irq_handle(void) __irq
{
uint32 regValue;
sendchar('i');
regValue = SSPMIS;
if ( regValue & SSPMIS_RTMIS )
timeout=1;
SSPICR = SSPICR_RTIC;
}
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