📄 main.lst
字号:
00000078 7E DB 0x7E
00000079 7E DB 0x7E
0000007A 7F DB 0x7F
0000007B 7F DB 0x7F
0000007C 7F DB 0x7F
0000007D 7F DB 0x7F
0000007E 7F DB 0x7F
0000007F 7F DB 0x7F
00000080 7F DB 0x7F
00000081 7F DB 0x7F
00000082 7F DB 0x7F
00000083 7F DB 0x7F
00000084 END_INIT
00000084 DAC0_next_out:
00000084 DS 1
00000085 DAC1_next_out:
00000085 DS 1
00000086 DAC2_next_out:
00000086 DS 1
00000087 DAC3_next_out:
00000087 DS 1
*** CODE SEGMENT '?PR?IRQ_Handler?A?main':
46: void IRQ_Handler (void) __irq {
00000000 E92D000F STMDB R13!,{R0-R3}
47: if (IRQSIG & 0x00000004) { /* Timer0 Interrupt */
00000004 E5100000 LDR R0,=0xFFFF0004
00000008 E5900000 LDR R0,[R0,#0x0]
0000000C E3100004 TST R0,#0x0004
00000010 0A00008C BEQ L_1 ; Targ=0x248
51: DAC0DAT = DAC0_next_out << 20; /* Convert last D/A value */
00000014 E5100000 LDR R0,=DAC0_next_out ; DAC0_next_out
00000018 E5D00000 LDRB R0,[R0,#0x0] ; DAC0_next_out
0000001C E1A01000 MOV R1,R0
00000020 E1A01A01 MOV R1,R1,LSL #20
00000024 E5100000 LDR R0,=0xFFFF0604
00000028 E5801000 STR R1,[R0,#0x0]
52: DAC1DAT = DAC1_next_out << 20;
0000002C E5100000 LDR R0,=DAC1_next_out ; DAC1_next_out
00000030 E5D00000 LDRB R0,[R0,#0x0] ; DAC1_next_out
00000034 E1A01000 MOV R1,R0
00000038 E1A01A01 MOV R1,R1,LSL #20
0000003C E5100000 LDR R0,=0xFFFF060C
00000040 E5801000 STR R1,[R0,#0x0]
53: DAC2DAT = DAC2_next_out << 20;
00000044 E5100000 LDR R0,=DAC2_next_out ; DAC2_next_out
00000048 E5D00000 LDRB R0,[R0,#0x0] ; DAC2_next_out
0000004C E1A01000 MOV R1,R0
00000050 E1A01A01 MOV R1,R1,LSL #20
00000054 E5100000 LDR R0,=0xFFFF0614
00000058 E5801000 STR R1,[R0,#0x0]
54: DAC3DAT = DAC3_next_out << 20;
0000005C E5100000 LDR R0,=DAC3_next_out ; DAC3_next_out
00000060 E5D00000 LDRB R0,[R0,#0x0] ; DAC3_next_out
00000064 E1A01000 MOV R1,R0
00000068 E1A01A01 MOV R1,R1,LSL #20
0000006C E5100000 LDR R0,=0xFFFF061C
00000070 E5801000 STR R1,[R0,#0x0]
59: if (i++ >= 511) i = 0;
00000074 E5101000 LDR R1,=i ; i
00000078 E5910000 LDR R0,[R1,#0x0] ; i
0000007C E2802001 ADD R2,R0,#0x0001
00000080 E5812000 STR R2,[R1,#0x0] ; i
00000084 E5102000 LDR R2,=0x1FF
ARM COMPILER V2.53, main 19/11/06 17:17:27 PAGE 6
00000088 E1500002 CMP R0,R2
0000008C 3A000002 BCC L_2 ; Targ=0x9C
00000090 E3A01000 MOV R1,#0x0
00000094 E5100000 LDR R0,=i ; i
00000098 E5801000 STR R1,[R0,#0x0] ; i
0000009C L_2:
61: if (i >= 384){
0000009C E5100000 LDR R0,=i ; i
000000A0 E5901000 LDR R1,[R0,#0x0] ; i
000000A4 E3510D06 CMP R1,#0x0180
000000A8 3A00001A BCC L_3 ; Targ=0x118
63: DAC0_next_out = 127 - sintab[127 - (i % 128)]; /* 180 - 270 quadrant */
000000AC E201007F AND R0,R1,#0x007F
000000B0 E3A0307F MOV R3,#0x7F
000000B4 E0433000 SUB R3,R3,R0
000000B8 E5100000 LDR R0,=sintab ; sintab
000000BC E7D00003 LDRB R0,[R0,+R3]
000000C0 E3A0307F MOV R3,#0x7F
000000C4 E0433000 SUB R3,R3,R0
000000C8 E1A03C03 MOV R3,R3,LSL #24
000000CC E1A03C23 MOV R3,R3,LSR #24
000000D0 E5100000 LDR R0,=DAC0_next_out ; DAC0_next_out
000000D4 E5C03000 STRB R3,[R0,#0x0] ; DAC0_next_out
64: DAC1_next_out = 1023 - 2*i;
000000D8 E1A00081 MOV R0,R1,LSL #1
000000DC E5103000 LDR R3,=0x3FF
000000E0 E0433000 SUB R3,R3,R0
000000E4 E1A03C03 MOV R3,R3,LSL #24
000000E8 E1A03C23 MOV R3,R3,LSR #24
000000EC E5100000 LDR R0,=DAC1_next_out ; DAC1_next_out
000000F0 E5C03000 STRB R3,[R0,#0x0] ; DAC1_next_out
65: DAC2_next_out = 0;
000000F4 E3A03000 MOV R3,#0x0
000000F8 E5100000 LDR R0,=DAC2_next_out ; DAC2_next_out
000000FC E5C03000 STRB R3,[R0,#0x0] ; DAC2_next_out
66: DAC3_next_out = i - 255;
00000100 E24130FF SUB R3,R1,#0x00FF
00000104 E1A03C03 MOV R3,R3,LSL #24
00000108 E1A03C23 MOV R3,R3,LSR #24
0000010C E5100000 LDR R0,=DAC3_next_out ; DAC3_next_out
00000110 E5C03000 STRB R3,[R0,#0x0] ; DAC3_next_out
67: }
00000114 EA000048 B L_4 ; Targ=0x23C
00000118 L_3:
68: else if (i >= 256){
00000118 E3510C01 CMP R1,#0x0100
0000011C 3A000017 BCC L_5 ; Targ=0x180
70: DAC0_next_out = 127 - sintab[i % 128]; /* 90 - 180 quadrant */
00000120 E201307F AND R3,R1,#0x007F
00000124 E5100000 LDR R0,=sintab ; sintab
00000128 E7D00003 LDRB R0,[R0,+R3]
0000012C E3A0307F MOV R3,#0x7F
00000130 E0433000 SUB R3,R3,R0
00000134 E1A03C03 MOV R3,R3,LSL #24
00000138 E1A03C23 MOV R3,R3,LSR #24
0000013C E5100000 LDR R0,=DAC0_next_out ; DAC0_next_out
00000140 E5C03000 STRB R3,[R0,#0x0] ; DAC0_next_out
71: DAC1_next_out = (i - 256) * 2;
00000144 E2413C01 SUB R3,R1,#0x0100
00000148 E1A03083 MOV R3,R3,LSL #1
0000014C E1A03C03 MOV R3,R3,LSL #24
00000150 E1A03C23 MOV R3,R3,LSR #24
00000154 E5100000 LDR R0,=DAC1_next_out ; DAC1_next_out
00000158 E5C03000 STRB R3,[R0,#0x0] ; DAC1_next_out
72: DAC2_next_out = 255;
0000015C E3A030FF MOV R3,#0xFF
ARM COMPILER V2.53, main 19/11/06 17:17:27 PAGE 7
00000160 E5100000 LDR R0,=DAC2_next_out ; DAC2_next_out
00000164 E5C03000 STRB R3,[R0,#0x0] ; DAC2_next_out
73: DAC3_next_out = i - 255;
00000168 E24130FF SUB R3,R1,#0x00FF
0000016C E1A03C03 MOV R3,R3,LSL #24
00000170 E1A03C23 MOV R3,R3,LSR #24
00000174 E5100000 LDR R0,=DAC3_next_out ; DAC3_next_out
00000178 E5C03000 STRB R3,[R0,#0x0] ; DAC3_next_out
74: }
0000017C EA00002E B L_4 ; Targ=0x23C
00000180 L_5:
75: else if (i >= 128) {
00000180 E3510080 CMP R1,#0x0080
00000184 3A000018 BCC L_7 ; Targ=0x1EC
76: DAC0_next_out = 128 + sintab[127 - (i % 128)]; /* 0 - 90 quadrant */
00000188 E201007F AND R0,R1,#0x007F
0000018C E3A0307F MOV R3,#0x7F
00000190 E0433000 SUB R3,R3,R0
00000194 E5100000 LDR R0,=sintab ; sintab
00000198 E7D00003 LDRB R0,[R0,+R3]
0000019C E1A03000 MOV R3,R0
000001A0 E2833080 ADD R3,R3,#0x0080
000001A4 E1A03C03 MOV R3,R3,LSL #24
000001A8 E1A03C23 MOV R3,R3,LSR #24
000001AC E5100000 LDR R0,=DAC0_next_out ; DAC0_next_out
000001B0 E5C03000 STRB R3,[R0,#0x0] ; DAC0_next_out
77: DAC1_next_out = 511 - i * 2;
000001B4 E1A00081 MOV R0,R1,LSL #1
000001B8 E0422000 SUB R2,R2,R0
000001BC E1A02C02 MOV R2,R2,LSL #24
000001C0 E1A02C22 MOV R2,R2,LSR #24
000001C4 E5100000 LDR R0,=DAC1_next_out ; DAC1_next_out
000001C8 E5C02000 STRB R2,[R0,#0x0] ; DAC1_next_out
78: DAC2_next_out = 255;
000001CC E3A020FF MOV R2,#0xFF
000001D0 E5100000 LDR R0,=DAC2_next_out ; DAC2_next_out
000001D4 E5C02000 STRB R2,[R0,#0x0] ; DAC2_next_out
79: DAC3_next_out = i;
000001D8 E1A02C01 MOV R2,R1,LSL #24
000001DC E1A02C22 MOV R2,R2,LSR #24
000001E0 E5100000 LDR R0,=DAC3_next_out ; DAC3_next_out
000001E4 E5C02000 STRB R2,[R0,#0x0] ; DAC3_next_out
80: }
000001E8 EA000013 B L_4 ; Targ=0x23C
000001EC L_7:
82: DAC0_next_out = 128 + sintab[i]; /* 270 - 0 quadrant */
000001EC E5100000 LDR R0,=sintab ; sintab
000001F0 E7D00001 LDRB R0,[R0,+R1]
000001F4 E1A02000 MOV R2,R0
000001F8 E2822080 ADD R2,R2,#0x0080
000001FC E1A02C02 MOV R2,R2,LSL #24
00000200 E1A02C22 MOV R2,R2,LSR #24
00000204 E5100000 LDR R0,=DAC0_next_out ; DAC0_next_out
00000208 E5C02000 STRB R2,[R0,#0x0] ; DAC0_next_out
83: DAC1_next_out = i * 2;
0000020C E1A02081 MOV R2,R1,LSL #1
00000210 E1A02C02 MOV R2,R2,LSL #24
00000214 E1A02C22 MOV R2,R2,LSR #24
00000218 E5100000 LDR R0,=DAC1_next_out ; DAC1_next_out
0000021C E5C02000 STRB R2,[R0,#0x0] ; DAC1_next_out
84: DAC2_next_out = 0;
00000220 E3A02000 MOV R2,#0x0
00000224 E5100000 LDR R0,=DAC2_next_out ; DAC2_next_out
00000228 E5C02000 STRB R2,[R0,#0x0] ; DAC2_next_out
85: DAC3_next_out = i;
0000022C E1A01C01 MOV R1,R1,LSL #24
ARM COMPILER V2.53, main 19/11/06 17:17:27 PAGE 8
00000230 E1A01C21 MOV R1,R1,LSR #24
00000234 E5100000 LDR R0,=DAC3_next_out ; DAC3_next_out
00000238 E5C01000 STRB R1,[R0,#0x0] ; DAC3_next_out
86: }
0000023C L_4:
87: T0CLRI = 1; /* Clear Timer 0 interrupt */
0000023C E3A01001 MOV R1,#0x1
00000240 E5100000 LDR R0,=0xFFFF030C
00000244 E5801000 STR R1,[R0,#0x0]
88: }
00000248 L_1:
89: }
00000248 E8BD000F LDMIA R13!,{R0-R3}
0000024C E25EF004 SUBS R15,R14,#0x0004
00000250 ENDP ; 'IRQ_Handler?A'
*** CODE SEGMENT '?PR?main?main':
91: void main (void)
00000000 B500 PUSH {LR}
97: DAC0CON = 0x13;
00000002 2113 MOV R1,#0x13
00000004 4800 LDR R0,=0xFFFF0600
00000006 6001 STR R1,[R0,#0x0]
98: DAC1CON = 0x13;
00000008 4800 LDR R0,=0xFFFF0608
0000000A 6001 STR R1,[R0,#0x0]
99: DAC2CON = 0x13;
0000000C 4800 LDR R0,=0xFFFF0610
0000000E 6001 STR R1,[R0,#0x0]
100: DAC3CON = 0x13;
00000010 4800 LDR R0,=0xFFFF0618
00000012 6001 STR R1,[R0,#0x0]
106: IRQEN = 0x00000004; /* Configure Timer 0 */
00000014 2104 MOV R1,#0x4
00000016 4800 LDR R0,=0xFFFF0008
00000018 6001 STR R1,[R0,#0x0]
107: T0LD = T0_LD; /* Timer reload value */
0000001A 4800 LDR R1,=0x1B85
0000001C 4800 LDR R0,=0xFFFF0300
0000001E 6001 STR R1,[R0,#0x0]
108: T0CON = 0xC0; /* Enable Timer 0, Mode: periodic, prescaler = 1 */
00000020 21C0 MOV R1,#0xC0
00000022 4800 LDR R0,=0xFFFF0308
00000024 6001 STR R1,[R0,#0x0]
111: }
00000026 L_9:
00000026 E7FE B L_9 ; T=0x00000026
112: }
00000028 BC08 POP {R3}
0000002A 4718 BX R3
0000002C ENDP ; 'main'
Module Information Static
----------------------------------
code size = ------
data size = 136
const size = ------
End of Module Information.
ARM COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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