bootloader_gnu.h

Sharp LH75401(ARM7)处理器部分控制程序。

/*;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 
 ; $Workfile:   bootloader_gnu.i  $ 
 ; $Revision:   0.00  $ 
 ; $Author:     AnvikE  $ 
 ; $Date:       Mar 06 2003   $ 
 ; 
 ; Project:     LH754XX
 ; 
 ; Description: 
 ;  This file is a header file for KEV754XX chip boot code..
 ; 
 ; Revision History: 
 ; 				
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;  
 ; 
 ;  Copyright (c) 2002 Sharp Microelectronics of the Americas 
 ; 
 ;  All rights reserved 
 ; 
 ;  SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION 
 ;  OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE, 
 ;  AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 ;  SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE. 
 ; 
 ;  SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 ;  FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 ;  SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE 
 ;  FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS. 
 ; 				
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;*/

/* LH75401 xPSR (Processor Status Rgeister) bits                      */
.equ MODE_USR    ,0x010
.equ MODE_FIQ    ,0x011
.equ MODE_IRQ    ,0x012
.equ MODE_SVC    ,0x013
.equ MODE_ABORT  ,0x017
.equ MODE_UNDEF  ,0x01b
.equ MODE_SYSTEM ,0x01F
.equ I_MASK      ,0x080
.equ F_MASK      ,0x040
.equ T_MASK      ,0x020

/* External Static RAM on external data bus                           */
.equ EXTERNAL_SRAM_BASE ,0x44000000
.equ EXTERNAL_SRAM_SIZE ,0x00100000	/* 1Mbyte */
.equ EXTERNAL_SRAM_END  ,EXTERNAL_SRAM_BASE + EXTERNAL_SRAM_SIZE

/* Internal Ram on the H-bus (DMA accessible)                         */
.equ INTERNAL_SRAM_BASE ,0x60000000
.equ INTERNAL_SRAM_SIZE ,0x00004000	/* 16Kbytes */
.equ INTERNAL_SRAM_END  ,INTERNAL_SRAM_BASE + INTERNAL_SRAM_SIZE

/* TCM (tightly coupled) SRAM on the Arm core (Not DMA accessible)    */
.equ TCM_SRAM_BASE      ,0x80000000
.equ TCM_SRAM_SIZE	    ,0x00004000	/* 16Kbytes */
.equ TCM_SRAM_END	    ,TCM_SRAM_BASE + TCM_SRAM_SIZE

/* Flash ROM                                                          */
.equ EXTERNAL_FLASH_BASE ,0x40000000
.equ EXTERNAL_FLASH_SIZE ,0x00400000	/* 4Mbytes */  
.equ EXTERNAL_FLASH_END  ,EXTERNAL_FLASH_BASE + EXTERNAL_FLASH_SIZE

/* Stacks locations                                                   */
.equ EXCEPTION_STACK     ,TCM_SRAM_END - 4
.equ C_STACK		     ,EXTERNAL_SRAM_END - 4
    
/* SMC (Static Memory Controller) registers                           */
.equ SMC_REG_BASE       ,0xFFFF1000
.equ SMC_BCR0_OFFSET    ,0x00
.equ SMC_BCR1_OFFSET	,0x04
.equ SMC_BCR2_OFFSET	,0x08
.equ SMC_BCR0_INIT      ,0x1C001481
.equ SMC_BCR1_INIT	    ,0x10000000
.equ SMC_BCR2_INIT	    ,0x10000C21

/* External interface configuration register                          */
.equ EBI_MUX_BASE       ,0xFFFE5000 
.equ EBI_PIN_CONFIG     ,0x00005B3F 

/* Reset, clocks and power control register (System clocks)           */
.equ RCPC_REG_BASE                ,0xFFFE2000
.equ RCPC_CONTROL_OFFSET          ,0x00000000	/* Control reg        */
.equ RCPC_REMAP_OFFSET            ,0x00000008   /* Remap memory reg   */
.equ RCPC_SYSCLK_PRESCALE_OFFSET  ,0x00000018   /* SysClk pre scale   */
.equ RCPC_SYSCLK_PRESCALE_DEFAULT ,0x00000001   /* 52Mhz              */
.equ RCPC_REMAP_INTERNAL_RAM      ,0x00000002

/* TIMER registers used for blinking led                              */
.equ TIMER0_REG_BASE              ,0xFFFC4000
.equ TIMER0_CTRL_REG_OFFSET       ,0x00
.equ TIMER0_CTRL_COUNT_CLEAR      ,0x01
.equ TIMER0_STATUS_REG_OFFSET     ,0x0C
.equ TIMER0_STATUS_CMP1           ,0x04
.equ TIMER0_MATCH                 ,0xFFFF 
.equ TIMER0_CMP_CAP_CTRL_INIT     ,0x4000
.equ TIMER0_CTRL_INIT             ,0x1B

/* GPIO  registers                                                    */
.equ GPIO_REG_BASE                ,0xFFFDE000
.equ GPIO_PDDR_OFFSET             ,0x00000004
.equ GPIO_PDDDR_OFFSET            ,0x0000000C
.equ GPIO_D1                      ,0x000000002

/* 
 * Dip switch, Entry point for application, and valid switch 
 * configurations 
 */ 
.equ DIP_SWITCH_ADRS  ,0x48200040
.equ ANGEL_ENTRY      ,EXTERNAL_SRAM_BASE
.equ ANGEL_DEMO       ,0xFD
.equ USER_DEMO        ,0xFE
.equ SECTOR_SIZE      ,0x00010000
.equ ANGEL_APP_SIZE   ,(SECTOR_SIZE*1)
.equ USER_APP_SIZE    ,(SECTOR_SIZE*15)
.equ ANGEL_APP_BASE   ,(SECTOR_SIZE*1)
.equ USER_APP_BASE    ,(SECTOR_SIZE*2)
.equ USER_ENTRY       ,EXTERNAL_SRAM_BASE