uart.c

Cirrus Logic EP7312处理器部分控制程序。

        //
        // Unmask the UART1 receive interrupt.
        //
        pulPtr[HwIntMask >> 2] |= HwIrqUartRx;

        //
        // Mark UART1 as being configured.
        //
        lPort1Enabled = 1;
    }
    else if(lPort == 2)
    {
        //
        // Turn on UART2.
        //
        pulPtr[HwControl2 >> 2] |= HwControlUartEnable;

        //
        // Configure UART2.
        //
        pulPtr[HwUart2Control >> 2] = lConfig | HwUartControlFifoEnable;

        //
        // Clear the local FIFO buffers.
        //
        iPort2TxRead = iPort2TxWrite = 0;
        iPort2RxRead = iPort2RxWrite = 0;

        //
        // Install the ISR so that we can process the UART interrupt.
        //
        InterruptInstallIRQ();

        //
        // Install the UART2 interrupt handler.
        //
        InterruptSetUART2Handler(UART2ISR);

        //
        // Unmask the UART2 receive interrupt.
        //
        pulPtr[HwIntMask2 >> 2] |= HwIrqUartRx;

        //
        // Mark UART2 as being configured.
        //
        lPort2Enabled = 1;
    }

    //
    // Success.
    //
    return(1);
}

//****************************************************************************
//
// UARTDisable will power off the specified UART.
//
//****************************************************************************
void
UARTDisable(long lPort)
{
    unsigned long * volatile pulPtr = (unsigned long *)HwBaseAddress;

    //
    // Power off the specified port.
    //
    if(lPort == 1)
    {
        //
        // There is nothing to do if UART1 is already disabled.
        //
        if(!lPort1Enabled)
        {
            return;
        }

        //
        // Wait until the transmit FIFO is empty.
        //
        while(iPort1TxRead != iPort1TxWrite)
        {
        }
        while(pulPtr[HwStatus >> 2] & HwStatusUartTxBusy)
        {
        }

        //
        // Mask the UART1 interrupts.
        //
        pulPtr[HwIntMask >> 2] &= ~(HwIrqUartRx | HwIrqUartTx);

        //
        // Remove the UART1 interrupt handler.
        //
        InterruptSetUART1Handler(0);

        //
        // Remove the interrupt handler.
        //
        InterruptRemoveIRQ();

        //
        // Turn off UART1.
        //
        pulPtr[HwControl >> 2] &= ~HwControlUartEnable;

        //
        // Mark UART1 as not being configured.
        //
        lPort1Enabled = 0;
    }
    else if(lPort == 2)
    {
        //
        // There is nothing to do if UART2 is already disabled.
        //
        if(!lPort2Enabled)
        {
            return;
        }

        //
        // Wait until the transmit FIFO is empty.
        //
        while(iPort2TxRead != iPort2TxWrite)
        {
        }
        while(pulPtr[HwStatus2 >> 2] & HwStatusUartTxBusy)
        {
        }

        //
        // Mask the UART2 interrupts.
        //
        pulPtr[HwIntMask2 >> 2] &= ~(HwIrqUartRx | HwIrqUartTx);

        //
        // Remove the UART2 interrupt handler.
        //
        InterruptSetUART2Handler(0);

        //
        // Remove the interrupt handler.
        //
        InterruptRemoveIRQ();

        //
        // Turn off UART2.
        //
        pulPtr[HwControl2 >> 2] &= ~HwControlUartEnable;

        //
        // Mark UART2 as not being configured.
        //
        lPort2Enabled = 0;
    }
    else
    {
        return;
    }
}

//****************************************************************************
//
// UARTSendChar sends a character to the specified UART.
//
//****************************************************************************
void
UARTSendChar(long lPort, char cChar)
{
    unsigned long * volatile pulPtr = (unsigned long *)HwBaseAddress;
    int iNextWrite;

    //
    // Choose the appropriate port.
    //
    if(lPort == 1)
    {
        //
        // Compute the new write position.
        //
        iNextWrite = (iPort1TxWrite + 1) & (SIZE - 1);

        //
        // Wait until there is space in the transmit FIFO for UART1.
        //
        while(iPort1TxRead == iNextWrite)
        {
        }

        //
        // Write the character to the UART1 transmit FIFO.
        //
        pcPort1TxData[iPort1TxWrite] = cChar;

        //
        // Advance to the next character.
        //
        iPort1TxWrite = iNextWrite;

        //
        // Enable the transmit interrupt for UART1.
        //
        pulPtr[HwIntMask >> 2] |= HwIrqUartTx;
    }
    else if(lPort == 2)
    {
        //
        // Compute the new write position.
        //
        iNextWrite = (iPort2TxWrite + 1) & (SIZE - 1);

        //
        // Wait until there is space in the transmit FIFO for UART2.
        //
        while(iPort2TxRead == iNextWrite)
        {
        }

        //
        // Write the character to UART2.
        //
        pcPort2TxData[iPort2TxWrite] = cChar;

        //
        // Advance to the next character.
        //
        iPort2TxWrite = iNextWrite;

        //
        // Enable the transmit interrupt for UART2.
        //
        pulPtr[HwIntMask2 >> 2] |= HwIrqUartTx;
    }
}

//****************************************************************************
//
// UARTReceiveChar receives a character from the specified UART.
//
//****************************************************************************
char
UARTReceiveChar(long lPort)
{
    char cCharRead;

    //
    // Choose the appropriate port.
    //
    if(lPort == 1)
    {
        //
        // Wait until there is data in the receive FIFO for UART1.
        //
        while(iPort1RxRead == iPort1RxWrite)
        {
        }

        //
        // Read the next character from the UART1 receive FIFO.
        //
        cCharRead = pcPort1RxData[iPort1RxRead];

        //
        // Advance to the next character.
        //
        iPort1RxRead = (iPort1RxRead + 1) & (SIZE - 1);

        //
        // Return the character we read.
        //
        return(cCharRead);
    }
    else if(lPort == 2)
    {
        //
        // Wait until there is data in the receive FIFO for UART2.
        //
        while(iPort2RxRead == iPort2RxWrite)
        {
        }

        //
        // Read the next character from the UART2 receive FIFO.
        //
        cCharRead = pcPort2RxData[iPort2RxRead];

        //
        // Advance to the next character.
        //
        iPort2RxRead = (iPort2RxRead + 1) & (SIZE - 1);

        //
        // Return the character we read.
        //
        return(cCharRead);
    }

    //
    // A bad UART port number was specified.
    //
    return(0);
}

//****************************************************************************
//
// UARTCharReady determines if there is a character ready to be read from the
// specified UART.
//
//****************************************************************************
long
UARTCharReady(long lPort)
{
    //
    // Choose the appropriate port.
    //
    if(lPort == 1)
    {
        //
        // See if there is a character waiting in the FIFO for UART1.
        //
        if(iPort1RxRead == iPort1RxWrite)
        {
            //
            // There is not a character waiting, so return false.
            //
            return(0);
        }

        //
        // There is a character waiting, so return true.
        //
        return(1);
    }
    else if(lPort == 2)
    {
        //
        // See if there is a character waiting in the FIFO for UART2.
        //
        if(iPort2RxRead == iPort2RxWrite)
        {
            //
            // There is not a character waiting, so return false.
            //
            return(0);
        }

        //
        // There is a character waiting, so return true.
        //
        return(1);
    }

    //
    // A bad UART port number was specified.
    //
    return(0);
}