ep7312.h

Cirrus Logic EP7312处理器部分控制程序。

#define HwUartControlRate4800                   0x0000002F
#define HwUartControlRate2400                   0x0000005F
#define HwUartControlRate1200                   0x000000BF
#define HwUartControlRate600                    0x0000017F
#define HwUartControlRate300                    0x000002FF
#define HwUartControlRate150                    0x000005FF
#define HwUartControlRate110                    0x0000082E
#define HwUartControlBreak                      0x00001000
#define HwUartControlParityEnable               0x00002000
#define HwUartControlParityEven                 0x00004000
#define HwUartControlTwoStopBits                0x00008000
#define HwUartControlFifoEnable                 0x00010000
#define HwUartControlDataLength                 0x00060000
#define HwUartControlDataLength5                0x00000000
#define HwUartControlDataLength6                0x00020000
#define HwUartControlDataLength7                0x00040000
#define HwUartControlDataLength8                0x00060000

//
// Definitions of the bit fields in the HwSpiData register.
//
#define HwSpiDataConfigMask                     0x000000FF
#define HwSpiDataFrameLengthMask                0x00001F00
#define HwSpiDataSampleClockFreerun             0x00002000
#define HwSpiDataTxFrame                        0x00004000
#define HwSpiDataConfigShift                    0
#define HwSpiDataFrameLengthShift               8

//
// Definitions of the bit fields in the HwControl2 register.
//
#define HwControl2CodecEnable                   0x00000001
#define HwControl2Kbd6                          0x00000002
#define HwControl2DramSize                      0x00000004
#define HwControl2KeyboardWakeupEnable          0x00000008
#define HwControl2SSI2TxEnable                  0x00000010
#define HwControl2PCMCIA1Enable                 0x00000020
#define HwControl2PCMCIA2Enable                 0x00000040
#define HwControl2SSI2RxEnable                  0x00000080
#define HwControl2Uart2Enable                   0x00000100
#define HwControl2SSI2MasterEnable              0x00000200
#define HwControl2OSTimerEnable                 0x00001000
#define HwControl2ClockSelect                   0x00002000
#define HwControl2BuzzerSelect                  0x00004000

//
// Definitions of the bit fields in the HwStatus2 register.
//
#define HwStatus2SSI2RxOverflow                 0x00000001
#define HwStatus2SSI2ResVal                     0x00000002
#define HwStatus2SSI2ResFrm                     0x00000004
#define HwStatus2SSI2RxFIFOEmpty                0x00000008
#define HwStatus2SSI2TxFIFOFull                 0x00000010
#define HwStatus2SSI2TxFIFOUnderflow            0x00000020
#define HwStatus2ClockMode                      0x00000040
#define HwStatus2Uart2TxBusy                    0x00000800
#define HwStatus2Uart2RxFifoEmpty               0x00400000
#define HwStatus2Uart2TxFifoFull                0x00800000

//
// Definitions of the bit fields in the HwIntStatus2 and HwIntMask2 registers.
//
#define HwIrqKeyboard                           0x00000001
#define HwIrqSSI2Rx                             0x00000002
#define HwIrqSSI2Tx                             0x00000004
#define HwIrqUart2Tx                            0x00001000
#define HwIrqUart2Rx                            0x00002000

//
// Definitions of the bit fields in the HwDAIControl register.
//
#define HwDAIControlMCE                         0x00010000
#define HwDAIControlECS                         0x00020000
#define HwDAIControlADM                         0x00040000
#define HwDAIControlTTM                         0x00080000
#define HwDAIControlTRM                         0x00100000
#define HwDAIControlATM                         0x00200000
#define HwDAIControlARM                         0x00400000
#define HwDAIControlLBM                         0x00800000

//
// Definitions of the bit fields in the HwDAIData0 register.
//
#define HwDAIData0DataMask                      0x0000FFFF
#define HwDAIData0DataShift                     0

//
// Definitions of the bit fields in the HwDAIData1 register.
//
#define HwDAIData1DataMask                      0x0000FFFF
#define HwDAIData1DataShift                     0

//
// Definitions of the FIFO command for the HwDAIData2 register.
//
#define HwDAIData2RightEnable                   0x000D8000
#define HwDAIData2LeftEnable                    0x00118000

//
// Definitions of the bit fields in the HwDAIStatus register.
//
#define HwDAIStatusATS                          0x00000001
#define HwDAIStatusARS                          0x00000002
#define HwDAIStatusTTS                          0x00000004
#define HwDAIStatusTRS                          0x00000008
#define HwDAIStatusATU                          0x00000010
#define HwDAIStatusARO                          0x00000020
#define HwDAIStatusTTU                          0x00000040
#define HwDAIStatusTRO                          0x00000080
#define HwDAIStatusANF                          0x00000100
#define HwDAIStatusANE                          0x00000200
#define HwDAIStatusTNF                          0x00000400
#define HwDAIStatusTNE                          0x00000800
#define HwDAIStatusFIFO                         0x00001000
#define HwDAIStatusACE                          0x00004000
#define HwDAIStatusTCE                          0x00008000

//
// Definitions of the bit fields in the HwControl3 register.
//
#define HwControl3ADCExtended                   0x00000001
#define HwControl3ClkCtlMask                    0x00000006
#define HwControl3ClkCtl18MHz                   0x00000000
#define HwControl3ClkCtl37MHz                   0x00000002
#define HwControl3ClkCtl49MHz                   0x00000004
#define HwControl3ClkCtl74MHz                   0x00000006
#define HwControl3DAISelect                     0x00000008
#define HwControl3ADCClkEdge                    0x00000010
#define HwControl3VersionMask                   0x000000E0
#define HwControl3FastWakeup                    0x00000100

//
// Definitions of the bit fields in the HwIntStatus3 and HwIntMask3 registers.
//
#define HwFiqDAI                                0x00000001

//
// Definitions of the bit fields in the HwLEDFlash register.
//
#define HwLEDFlashRateMask                      0x00000003
#define HwLEDFlashRate1Sec                      0x00000000
#define HwLEDFlashRate2Sec                      0x00000001
#define HwLEDFlashRate3Sec                      0x00000002
#define HwLEDFlashRate4Sec                      0x00000003
#define HwLEDFlashRatioMask                     0x0000003C
#define HwLEDFlashRatio1_15                     0x00000000
#define HwLEDFlashRatio2_14                     0x00000004
#define HwLEDFlashRatio3_13                     0x00000008
#define HwLEDFlashRatio4_12                     0x0000000C
#define HwLEDFlashRatio5_11                     0x00000010
#define HwLEDFlashRatio6_10                     0x00000014
#define HwLEDFlashRatio7_9                      0x00000018
#define HwLEDFlashRatio8_8                      0x0000001C
#define HwLEDFlashRatio9_7                      0x00000020
#define HwLEDFlashRatio10_6                     0x00000024
#define HwLEDFlashRatio11_5                     0x00000028
#define HwLEDFlashRatio12_4                     0x0000002C
#define HwLEDFlashRatio13_3                     0x00000030
#define HwLEDFlashRatio14_2                     0x00000034
#define HwLEDFlashRatio15_1                     0x00000038
#define HwLEDFlashRatio16_0                     0x0000003C
#define HwLEDFlashEnable                        0x00000040

//
// The base address of the parallel port.
//
#define HwLptData                               0x30000000
#define HwLptControlStatus                      0x30000001

//
// Definitions of the bit fields in the parallel port register.
//
#define HwLptDataMask                           0xFF
#define HwLptStatusnError                       0x01
#define HwLptStatusPaperEnd                     0x02
#define HwLptStatusnAck                         0x04
#define HwLptStatusBusy                         0x08
#define HwLptOutputEnable                       0x10
#define HwLptStatusSelect                       0x20
#define HwLptControlnStrobe                     0x10
#define HwLptControlnAutoFeed                   0x20
#define HwLptControlnSelectIn                   0x40
#define HwLptControlIntEnable			0x40
#define HwLptControlnInit                       0x80

//
// The base address of the NAND FLASH.
//
#define HwNANDAddress                           0x10000000

//
// The base address of the keyboard extended row latch.
//
#define HwKeyboardExRowAddress                  0x30010000

//
// The base address of the external GPIO latch.
//
#define HwExtGPIOAddress                        0x30010000

//
// The base address of the LCD frame buffer in ARM memory.
//
#define HwLcdBaseAddress                        0xC0000000

//
// The base address of the PS/2 Interface.
// 
#define HwPs2BaseAddress			0x40010000

//
// Locations of the vectors in the ARM vector table.
//
#define ArmResetVector                          0x00000000
#define ArmUndefInstrVector                     0x00000004
#define ArmSwiVector                            0x00000008
#define ArmPrefAbortVector                      0x0000000C
#define ArmDataAbortVector                      0x00000010
#define ArmReservedVector                       0x00000014
#define ArmIrqVector                            0x00000018
#define ArmFiqVector                            0x0000001C

//
// Locations of the flags in the ARM PSR register.
//
#define ArmMaskMode                             0x0000001F
#define ArmUserMode                             0x00000010
#define ArmFIQMode                              0x00000011
#define ArmIRQMode                              0x00000012
#define ArmSVCMode                              0x00000013
#define ArmAbortMode                            0x00000017
#define ArmUndefMode                            0x0000001B
#define ArmFiqDisable                           0x00000040
#define ArmIrqDisable                           0x00000080
#define ArmMaskCC                               0xF0000000
#define ArmFlagV                                0x10000000
#define ArmFlagC                                0x20000000
#define ArmFlagZ                                0x40000000
#define ArmFlagN                                0x80000000

//
// The coprocessor number of the MMU on the EP7312.
//
#define ArmMmuCP                                0xF

//
// The coprocessor registers in the MMU of the EP7312.
//
#define ArmMmuId                                0x00
#define ArmMmuControl                           0x01
#define ArmMmuPageTableBase                     0x02
#define ArmMmuDomainAccess                      0x03
#define ArmMmuFlushTlb                          0x05
#define ArmMmuPurgeTlb                          0x06
#define ArmMmuFlushIdc                          0x07

//
// Definitions of the bit fields in the MMU control register.
//
#define ArmMmuControlMmuEnable                  0x00000001
#define ArmMmuControlAlignFaultEnable           0x00000002
#define ArmMmuControlCacheEnable                0x00000004
#define ArmMmuControlWriteBufferEnable          0x00000008
#define ArmMmuControl32BitCodeEnable            0x00000010
#define ArmMmuControl32BitDataEnable            0x00000020
#define ArmMmuControlMandatory                  0x00000040
#define ArmMmuControlBigEndianEnable            0x00000080
#define ArmMmuControlSystemEnable               0x00000100
#define ArmMmuControlRomEnable                  0x00000200