📄 at91sam7s64.inc
字号:
# ----------------------------------------------------------------------------
# ATMEL Microcontroller Software Support - ROUSSET -
# ----------------------------------------------------------------------------
# The software is delivered "AS IS" without warranty or condition of any
# kind, either express, implied or statutory. This includes without
# limitation any warranty or condition with respect to merchantability or
# fitness for any particular purpose, or against the infringements of
# intellectual property rights of others.
# ----------------------------------------------------------------------------
# File Name : AT91SAM7S64.h
# Object : AT91SAM7S64 definitions
# Generated : AT91 SW Application Group 05/10/2004 (16:48:01)
#
# CVS Reference : /AT91SAM7S64.pl/1.11/Mon May 03 12:38:52 2004//
# CVS Reference : /SYSC_SAM7Sxx.pl/1.4/Mon May 03 10:57:22 2004//
# CVS Reference : /MC_SAM02.pl/1.3/Wed Mar 10 08:37:04 2004//
# CVS Reference : /UDP_1765B.pl/1.3/Fri Aug 02 14:45:38 2002//
# CVS Reference : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
# CVS Reference : /lib_pmc_SAM.h/1.6/Tue Apr 27 13:53:52 2004//
# CVS Reference : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
# CVS Reference : /DBGU_1754A.pl/1.4/Fri Jan 31 12:18:24 2003//
# CVS Reference : /US_1739C.pl/1.2/Fri Jul 12 07:49:26 2002//
# CVS Reference : /SPI2.pl/1.2/Fri Oct 17 08:13:40 2003//
# CVS Reference : /SSC_1762A.pl/1.2/Fri Nov 08 13:26:40 2002//
# CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
# CVS Reference : /TWI_1761B.pl/1.4/Fri Feb 07 10:30:08 2003//
# CVS Reference : /PDC_1734B.pl/1.2/Thu Nov 21 16:38:24 2002//
# CVS Reference : /ADC_SAM.pl/1.7/Fri Oct 17 08:12:38 2003//
# CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
# ----------------------------------------------------------------------------
# Hardware register definition
# *****************************************************************************
# SOFTWARE API DEFINITION FOR System Peripherals
# *****************************************************************************
# *** Register offset in AT91S_SYSC structure ***
.equ SYSC_AIC_SMR, ( 0) /*Source Mode Register */
.equ SYSC_AIC_SVR, (128) /* Source Vector Register */
.equ SYSC_AIC_IVR, (256) /* IRQ Vector Register */
.equ SYSC_AIC_FVR, (260) /* FIQ Vector Register */
.equ SYSC_AIC_ISR, (264) /* Interrupt Status Register */
.equ SYSC_AIC_IPR, (268) /* Interrupt Pending Register */
.equ SYSC_AIC_IMR, (272) /* Interrupt Mask Register */
.equ SYSC_AIC_CISR, (276) /* Core Interrupt Status Register */
.equ SYSC_AIC_IECR, (288) /* Interrupt Enable Command Register */
.equ SYSC_AIC_IDCR, (292) /* Interrupt Disable Command Register */
.equ SYSC_AIC_ICCR, (296) /* Interrupt Clear Command Register */
.equ SYSC_AIC_ISCR, (300) /* Interrupt Set Command Register */
.equ SYSC_AIC_EOICR, (304) /* End of Interrupt Command Register */
.equ SYSC_AIC_SPU, (308) /* Spurious Vector Register */
.equ SYSC_AIC_DCR, (312) /* Debug Control Register (Protect) */
.equ SYSC_AIC_FFER, (320) /* Fast Forcing Enable Register */
.equ SYSC_AIC_FFDR, (324) /* Fast Forcing Disable Register */
.equ SYSC_AIC_FFSR, (328) /* Fast Forcing Status Register */
.equ SYSC_DBGU_CR, (512) /* Control Register */
.equ SYSC_DBGU_MR, (516) /* Mode Register */
.equ SYSC_DBGU_IER, (520) /* Interrupt Enable Register */
.equ SYSC_DBGU_IDR, (524) /* Interrupt Disable Register */
.equ SYSC_DBGU_IMR, (528) /* Interrupt Mask Register */
.equ SYSC_DBGU_CSR, (532) /* Channel Status Register */
.equ SYSC_DBGU_RHR, (536) /* Receiver Holding Register */
.equ SYSC_DBGU_THR, (540) /* Transmitter Holding Register */
.equ SYSC_DBGU_BRGR, (544) /* Baud Rate Generator Register */
.equ SYSC_DBGU_C1R, (576) /* Chip ID1 Register */
.equ SYSC_DBGU_C2R, (580) /* Chip ID2 Register */
.equ SYSC_DBGU_FNTR, (584) /* Force NTRST Register */
.equ SYSC_DBGU_RPR, (768) /* Receive Pointer Register */
.equ SYSC_DBGU_RCR, (772) /* Receive Counter Register */
.equ SYSC_DBGU_TPR, (776) /* Transmit Pointer Register */
.equ SYSC_DBGU_TCR, (780) /* Transmit Counter Register */
.equ SYSC_DBGU_RNPR, (784) /* Receive Next Pointer Register */
.equ SYSC_DBGU_RNCR, (788) /* Receive Next Counter Register */
.equ SYSC_DBGU_TNPR, (792) /* Transmit Next Pointer Register */
.equ SYSC_DBGU_TNCR, (796) /* Transmit Next Counter Register */
.equ SYSC_DBGU_PTCR, (800) /* PDC Transfer Control Register */
.equ SYSC_DBGU_PTSR, (804) /* PDC Transfer Status Register */
.equ SYSC_PIOA_PER, (1024) /* PIO Enable Register */
.equ SYSC_PIOA_PDR, (1028) /* PIO Disable Register */
.equ SYSC_PIOA_PSR, (1032) /* PIO Status Register */
.equ SYSC_PIOA_OER, (1040) /* Output Enable Register */
.equ SYSC_PIOA_ODR, (1044) /* Output Disable Registerr */
.equ SYSC_PIOA_OSR, (1048) /* Output Status Register */
.equ SYSC_PIOA_IFER, (1056) /* Input Filter Enable Register */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -