dss_aisr.s54

来自「使用在TI 系列dsk5402 的很多可用例子」· S54 代码 · 共 275 行

;
;  Copyright 2003 by Texas Instruments Incorporated.
;  All rights reserved. Property of Texas Instruments Incorporated.
;  Restricted rights to use, duplicate or disclose this code are
;  granted through contract.
;
;  @(#) XDAS 2.51.00 11-29-2003 (xdas-2.50.00.9)
;
;
;  ======== dss_aisr.s54 ========
;
;

        .include c54.h54
        .include gbl.h54
        .include hwi.h54        ; sets .mmregs
        .include pip.h54

        .include dss.h54

        .text

; set BSP to 1 to use 549 BSP 1 and Spectrum Digital 549 card
; set BSP to 2 to use 5402 McBSP0 and Spectrum Digital eZdsp 5402 card
; set BSP to 2 to use 5410 McBSP0 and Spectrum Digital sd5410 card
; set BSP to 3 to use 5402 McBSP1 and DSK5402 card

        .if ($isdefed("_SD54_"))
BSP     .set 1
        .endif

        .if ($isdefed("_DSK5402_"))
BSP     .set 3
        .endif

        .if ($isdefed("_SD5410_"))
BSP     .set 2
        .endif

        .if     BSP = 1 
RDRR    .set    BDRR            ; 0x20
RDXR    .set    BDXR            ; 0x21
        .endif 
        .if     BSP = 0
RDRR    .set    TRCV            ; 0x30
RDXR    .set    TDXR            ; 0x30
        .endif 
        .if     BSP = 2
RDRR    .set    0x21            ; McBSP0 data receive register 1
RDXR    .set    0x23            ; McBSP0 data transmit register 1
        .endif 
        .if     BSP = 3
RDRR    .set    0x41            ; McBSP1 data receive register 1
RDXR    .set    0x43            ; McBSP1 data transmit register 1
        .endif 

        .if ($isdefed("RDRR") = 0)  ; RDRR is not defined above
        .emsg   "unknown board specification"
        .endif 

        .bss    rtxDone,1,0,0   ; bit 0 for rxDone, bit 1 for txDone

        .text

        .global _DSS_isr

;
; ====== _DSS_isr ======
;
_DSS_isr:

        pshm    st0
        pshm    st1
        ssbx    sxm                     ; sign extend mode

        pshm    al
        pshm    ah
        pshm    ag
        pshm    bl
        pshm    bh
        pshm    bg
        pshm    ar2

;    int rxDone = 0;
;    int txDone = 0;

        ld      #0,b

checkRead:

;    if (DSS_rxCnt) {

        ld      *(_DSS_rxCnt),a
        bcd     readError,aeq           ; branch to readError if DSS_rxCnt = 0
        add     #-1,a

;       DSS_rxCnt--;

        stl     a,*(_DSS_rxCnt)

;       if (DSS_rxCnt == 0) {
;           rxDone = 1;
;       }

        xc      2,aeq
        or      #1,b

;       *DSS_rxPtr++ = *DRR;

        mvdm    *(_DSS_rxPtr),ar2
        ldm     RDRR,a  
        stl     a,*ar2
        addm    #1,*(_DSS_rxPtr)

checkWrite:

;    if (DSS_txCnt) {

        ld      *(_DSS_txCnt),a
        bcd     writeError,aeq          ; branch to writeError if DSS_txCnt = 0
        add     #-1,a

;       DSS_txCnt--;

        stl     a,*(_DSS_txCnt)

;       if (DSS_txCnt == 0) {
;           rxDone = 1;
;       }

        xc      2,aeq           ; branch to checkDone if DSS_txCnt != 0
        or      #2,b

;       *DXR = *DSS_txPtr++;

        mvdm    *(_DSS_txPtr),ar2
        nop
        ld      *ar2,a
        and #0fffeh,a        ;kbc add for SD54 CODEC
        stlm    a,RDXR
        addm    #1,*(_DSS_txPtr)

checkDone:


;    if ((rxDone | txDone) == 0) {
;       return;         /* rete */
;    }

        bcd     rxDone,bneq
        stl     b,*(rtxDone)
        popm    ar2
        popm    bg
        popm    bh
        popm    bl
        popm    ag
        popm    ah
        popm    al

        popm    st1
        popm    st0
        nop
        nop

    .if __far_mode
        frete
    .else
        rete
    .endif

rxDone:

        popm    ar2
        popm    bg
        popm    bh
        popm    bl
        popm    ag
        popm    ah
        popm    al

        popm    st1
        popm    st0

        ; intm = 1

        HWI_enter C54_CNOTPRESERVED, 0ffffh

        ; dp = GBL_A_SYSPAGE
        ; cpl = 0

;    if (rxDone) {

        bitf    *(rtxDone),#1
        bc      txDone,ntc

;       PIP_put(&DSS_rxPipe);

        ; ar2 = pipe

        stm     #_DSS_rxPipe,ar2
        PIP_put

        ; none

;       DSS_rxPrime();
        
        ssbx    cpl                     ; set cpl to call C fxn
        nop                             ; cpl latency
        nop
        nop

    .if __far_mode
        fcall _DSS_rxPrime
    .else
        call _DSS_rxPrime
    .endif

txDone:

;    if (txDone) {

        bitf    *(rtxDone),#2
        bc      restoreAndExit,ntc

;       PIP_free(&DSS_txPipe);

        ; ar2 = pipe

        stm     #_DSS_txPipe,ar2
        PIP_free

        ; none

;       DSS_txPrime();

        ssbx    cpl                     ; set cpl to call C fxn
        nop                             ; cpl latency
        nop
        nop

    .if __far_mode
        fcall _DSS_txPrime
    .else
        call _DSS_txPrime
    .endif

restoreAndExit:

        ; cpl = 0
        ; dp = GBL_A_SYSPAGE

        rsbx    cpl
        nop                             ; cpl latency
        nop
        nop

        ld      #GBL_A_SYSPAGE, dp

        HWI_exit C54_CNOTPRESERVED, 0ffffh

        ; intm = 0
        
readError:
        
        orm     #1,*(_DSS_error)
        bd      checkWrite
        ldm     RDRR,a                  ; Read and discard Receive Register
        nop

writeError:

        orm     #2,*(_DSS_error)
        bd      checkDone       
        stm     #0,RDXR                 ; Write 0 to Transmit Register