dss_ad50.s54

来自「使用在TI 系列dsk5402 的很多可用例子」· S54 代码 · 共 542 行 · 第 1/2 页

        ; dummy read to clear RRDY
        ld      DRR1_1, A
        WAITTRX
 
        ;; Perform dummy read of primary slot
        ld      DRR1_1, A
 
        ;; Set FC to request secondary communications
        stm #dss_tmp, ar0
        nop
        portr CPLD_CTRL2, *ar0
        andm #MCBSP1_TO_CODEC1, *ar0
        portw *ar0, CPLD_CTRL2

        ;; wait for rrdy
        WAITTRX
 
        ;; dummy read of primary slot
        ld      DRR1_1, A
        ;; write command
        stm     #:progword:,DXR1_1
        ;; clear FC
        stm #dss_tmp, ar0
        nop           
        portr CPLD_CTRL2, *ar0
        andm  #(~CODEC1_FC_ON), *ar0
        portw *ar0, CPLD_CTRL2
 
        ;; wait for rrdy
        WAITTRX
 
        ;; dummy read of secondary slot
        ld      DRR1_1, A
        ;; write 0 for next primary slot
        stm     #0, DXR1_1
 
          .endm

    ; tmp for portr/w. could/should use the stack instead
    .bss dss_tmp, 1
        .else
PROGREG .macro    progword
          st   #1b, McDXR1              ; requesting secondary communications
          WAITTRX
          st   #:progword:, McDXR1
          WAITTRX
          .endm        
        .endif

;
; ======== DSS_init ========
;
     .global _DSS_init
_DSS_init 
     
        .if ($isdefed("_SD5410_"))
     ; clear CPL for DP-relative addressing
     rsbx CPL
     nop                 ; cpl latency
     nop                 ; cpl latency
     nop                 ; cpl latency

     ld      #0, DP                  ; Set data pointer to Page 0
     ssbx    SXM                     ; 
     

;
; Set up McBSP Control Registers
;

     stm     #SPCR1_sa, SPSA      ; select  McBSP0 SPCR1 register
     stm     #I_SPCR1,  SPAD      ; initial McBSP0 SPCR1 setting
     stm     #SPCR2_sa, SPSA      ; select  McBSP0 SPCR2 register
     stm     #I_SPCR2,  SPAD      ; initial McBSP0 SPCR2 setting
     stm     #RCR1_sa,  SPSA      ; select  McBSP0 RCR1 register
     stm     #I_RCR1,   SPAD      ; initial McBSP0 RCR1 setting
     stm     #RCR2_sa,  SPSA      ; select  McBSP0 RCR2 register
     stm     #I_RCR2,   SPAD      ; initial McBSP0 RCR2 setting
     stm     #XCR1_sa,  SPSA      ; select  McBSP0 XCR1 register
     stm     #I_XCR1,   SPAD      ; initial McBSP0 XCR1 setting
     stm     #XCR2_sa,  SPSA      ; select  McBSP0 XCR2 register
     stm     #I_XCR2,   SPAD      ; initial McBSP0 XCR2 setting

;
; Set up Pin Registers
;
     stm     #PCR_sa,   SPSA      ; select  McBSP0 Pin Control register
     stm     #I_PCR,    SPAD      ; initial McBSP0 Pin  setting


;
;    Enable Reciever
;
;
     stm     #SPCR1_sa, SPSA       ; select  McBSP0 SPCR1 register
     orm     #RRST_s,   SPAD      ; Enable Reciever

;
;
;
samp1:

     stm  #SPCR2_sa, SPSA               ; select McBSP0 SPCR2 register
     orm  #XRST_s, SPAD         ; Enable Xmitter
        .endif

        .if ($isdefed("_DSK5402_"))
     rsbx CPL
     nop                 ; cpl latency
     nop                 ; cpl latency
     nop                 ; cpl latency
 
     ld   #0, DP
     ssbx INTM
     ssbx SXM
 
 
     
     WR_MCBSP_SUB_REG   SPCR1_sa,#0h               ; reset McBSP0
     WR_MCBSP_SUB_REG   SPCR2_sa,#0h
 
     ;; write McBSP registers
     WR_MCBSP_SUB_REG   RCR1_sa,#I_RCR1
     WR_MCBSP_SUB_REG   RCR2_sa,#I_RCR2
     
     WR_MCBSP_SUB_REG   XCR1_sa,#I_XCR1
     WR_MCBSP_SUB_REG   XCR2_sa,#I_XCR2
     
     WR_MCBSP_SUB_REG   PCR_sa,#I_PCR
     
     WR_MCBSP_SUB_REG   SPCR1_sa,#I_SPCR1
     WR_MCBSP_SUB_REG   SPCR2_sa,#I_SPCR2
 
     ;; connect to appropriate source
     stm #dss_tmp, ar0
     nop           
     portr CPLD_CTRL2, *ar0
     andm #MCBSP1_TO_CODEC1, *ar0
     portw *ar0, CPLD_CTRL2
 
     ;; set interrupts to come from serial ports not DMA
     ;; by clearing bits 6 and 7 in DMPREC
     andm       #0ff3fh, 54h
 
     ;; clear xmit register -- why?
     stm #0, DXR1_1
 
     ;; now enable McBSP transmit and receive
     WR_MCBSP_SUB_REG   SPCR1_sa,#I_SPCR1 | 1
     WR_MCBSP_SUB_REG   SPCR2_sa,#I_SPCR2 | 1
        .endif

;*************************************************************************
;*   AIC_INIT:
;*
;*   Initialization of TLC320AD55.         
;*   
;*************************************************************************

     .global _AIC_INIT
AIC_INIT  
     orm  #IMASK, IMR           ; only receive-int is enabled/served.
     st   #0ffffh, IFR
 
        .if ($isdefed("_SD5410_"))
     WAITTRX       
        .endif

;*************************************************************************
;*   Control 1:                                          Config
;*
;*   D7 Software reset                            No RESET
;*   D6 Software power-down                       No Powerdown
;*   D5 Normal/aux inputs                         Select Inp Inputs
;*   D4 Monitor Normal/Aux                        Monitor on Inp
;*   D3,D2     Monitor Gain                               MUTE
;*             (00 = MUTE, 01 = 0db, 10 = -8db 11 = -18db )
;*   D1 Digital feedback                         no loopbakc
;*   D0 16-bit or 15-bit mode                    15 bit mode
;*
;*                                                       0x00
;*
;*************************************************************************

Control_1
     
     PROGREG   0000000100000000b        ;Control 1

;*************************************************************************
;*   Control 2:
;*
;*   D7 Flag Output value                  0 Flag to 0
;*   D6 Phone Mode                         0 Phone Mode Disabled
;*   D5 Decimator FIR overflow
;*   D4 16 bit ADC Mode                    0 No 16 bit ADC
;*   D3 Analog Loop Back                   0 No loopback
;*   D2 RESERVED                           0
;*   D1 RESERVED                           0
;*   D0 RESERVED                           0
;*
;*************************************************************************

Control_2

     PROGREG   0000001000000000b        ;Control 2

;*************************************************************************
;*   Control 3: Slave Interfaces
;*
;*   D7,D6     Number of Slaves ( 3 max )          00
;*   D5-D0     Number of SCLKS between FS- & FSD-  000000
;*
;*************************************************************************

Control_3

     PROGREG   0000001100000000b        ;

;*************************************************************************
;*   Control 4: Gains and Frequency
;*
;*   D7 External Sample Clock              1
;*   D6-D4     Fs = MCLK/(128*n) 3 max )           100
;*   D2,D3     Input Gain                          00
;*   D1,D0     Output Gain                         00
;*
;*************************************************************************
;*   Fsclk divide   
;*   
;*   MCLK = 16.384 Mhz
;*   Fsclk = 8K
;*   SCLK = MCLK/(2*Fsclk) = 1.024 Mhz = 128*sample frequency
;*  
;*   Note!!!
;*   The DS5410 crystal runs at 16.384 MHz.
;*   THe DSK5402 crystal runs at 8.192 MHz.
;*
;*************************************************************************
;*
;*************************************************************************

Control_4
        .if ($isdefed("_DSK5402_"))
     PROGREG   0000010010100000b       ;Fk (8 kHertz)
        .endif
        .if ($isdefed("_SD5410_"))
;        PROGREG   0000010010100000b       ;Fk (16 kHertz)
     PROGREG   0000010011000000b        ;Fk (8 kHertz)
        .endif
        .if ($isdefed("_DSK5402_"))
     ld   DRR1_1, A
     ld   DRR1_1, A

     stlm A,DXR1_1
     stlm A,DXR1_1
        .endif
     
     ; set CPL since _DSS_init is C function
     ssbx CPL
     nop                 ; cpl latency
     nop                 ; cpl latency
     nop                 ; cpl latency

    .if __far_mode
        fret
    .else
        ret
    .endif

          .end