dma1.c

来自「使用在TI 系列dsk5402 的很多可用例子」· C语言 代码 · 共 171 行

/*
 *  Copyright 2002 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DSP/BIOS 4.80.208 12-06-02 (barracuda-l19)" */
/******************************************************************************\
*           Copyright (C) 2000 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... dma1.c
* DATE CREATED.. 01/11/2000
* LAST MODIFIED. 09/27/2000
\******************************************************************************/
#include <std.h>
#include <log.h>

#include "dma1cfg.h"

#include <csl.h>
#include <csl_dma.h>

/*----------------------------------------------------------------------------*/
/* create a data from DMA transfer */

#define N       16

/* Place data in separate section to ensure placement */
/* within the DMA memory space defined for the device.*/
/* The address ranges chosen for this example in the  */
/* linker command file place src and dst within the   */
/* DMA memory map for the TMS320C5402. When modifying */
/* this example to run on a different C54x target,    */
/* please check the datasheet for your specific       */
/* device to make sure that the src and dst addresses */
/* for your transfer are assigned to a valid DMA      */
/* memory space.                                      */  

/* All processing for DMA initialization. etc.. will  */
/* take place within the funtion, "taskFunc". This    */
/* function has been statically configured as a       */
/* DSPBIOS TASK (TSK), in the dma1.cdb file that is  */
/* included in this project. This task will execute   */
/* automatically on exit from "main".                 */

#pragma DATA_SECTION(src,"dmaMem")
Uint16 src[N];
    
#pragma DATA_SECTION(dst, "dmaMem")
Uint16 dst[N];


/* In this example, we will be effecting a DMA   */
/* transfer from DATA to DATA space in internal  */
/* memory. The DMA will operate in multi-frame   */
/* mode and we will poll for DMA operation       */
/* complete.                                     */


/* These are the settings we need for the DMA    */
/* mode control register, DMMCR, in order to     */
/* perform the transfer                          */


/*  DMMCR0 = 0x0145u                                  */
/*  #0000000101000101b                                */
/*  ;0~~~~~~~~~~~~~~~ (AUTOINIT)  No Autoinit         */
/*  ;~0~~~~~~~~~~~~~~ (DINM)      No Interrupts       */
/*  ;~~0~~~~~~~~~~~~~ (IMOD)      N/A                 */
/*  ;~~~0~~~~~~~~~~~~ (CTMOD)     Multi-frame on      */
/*  ;~~~~0~~~~~~~~~~~               N/A                 */ 
/*  ;~~~~~001~~~~~~~~ (SIND)        Src addr Post-incr  */
/*  ;~~~~~~~~01~~~~~~ (DMS)       Src in data space   */
/*  ;~~~~~~~~~~0~~~~~             N/A                 */
/*  ;~~~~~~~~~~~001~~ (DIND)      Dst addr Post-incr  */
/*  ;~~~~~~~~~~~~~~01 (DMD)       Dst in data space   */

/* These are the settings required for DMA sync and   */
/* frame count register, DMSFC                        */

/*    DMSFC0 = 0x0000u                                */
/*                                                    */
/*    #0000000000000000b                              */
/*    ;0000~~~~~~~~~~~~ (DSYN)    No sync event       */
/*    ;~~~~0~~~~~~~~~~~ (DBLW)    Single-word mode    */
/*    ;~~~~~000~~~~~~~~           N/A                 */
/*    ;~~~~~~~~00000000 (Frame Count) = 0 (one frame) */
   
/* Create a DMA configuration structure for the transfer */
/* using predefined CSL macros and symbolic constants    */

DMA_Config  myconfig = {   
  1,                                  /* Set Priority */
  DMA_DMMCR_RMK(
    DMA_DMMCR_AUTOINIT_OFF,
    DMA_DMMCR_DINM_OFF,
    DMA_DMMCR_IMOD_FULL_ONLY,
    DMA_DMMCR_CTMOD_MULTIFRAME,
    DMA_DMMCR_SIND_POSTINC,
    DMA_DMMCR_DMS_DATA,
    DMA_DMMCR_DIND_POSTINC,
    DMA_DMMCR_DMD_DATA
  ),                                        /* DMMCR */
  DMA_DMSFC_RMK(
    DMA_DMSFC_DSYN_NONE,
    DMA_DMSFC_DBLW_OFF,
    DMA_DMSFC_FRAMECNT_OF(0)
  ),                                        /* DMSFC */
    (DMA_AdrPtr) &src[0],                   /* DMSRC */
    (DMA_AdrPtr) &dst[0],                   /* DMDST */
    (Uint16)(N-1)                           /* DMCTR */
};

/*----------------------------------------------------------------------------*/
void main() {
  Uint16 i;

  /* Initialize CSL library, this step is required */
  CSL_init();

  /* Set Src values and Clear destination */
  for (i=0; i<= N-1; i++) {
    src[i] = 0xDEAD;                   
    dst[i] = 0;
  }
}

/*----------------------------------------------------------------------------*/
void taskFunc() {

   DMA_Handle myhDma;
   Uint16 err = 0;
   Uint16 i;

   LOG_printf(&LogMain,"<DMA1>");

     
  /* Open DMA channel 0, to use for this transfer */
  myhDma = DMA_open(DMA_CHA0, 0);    

  /* Call DMA_config function to write our configuration */
  /* values to DMA channel control registers             */         
  DMA_config(myhDma, &myconfig);          

  /* Call DMA_start to begin the data transfer */
  DMA_start(myhDma);      

  /* Poll DMA status too see if its done       */                    
  while(DMA_getStatus(myhDma));               

  /* Check the values to make sure DMA transfer is */
  /* correct.                                      */  
  for (i = 0; i <= N-1; i++) {
    if (dst[i] != 0xDEADu) {
      ++err;
    }
  }

  /* We are done, so close DMA channel */
  DMA_close(myhDma); 
  LOG_printf(&LogMain,"Multi-frame transfer attempted. Source and Destination Addressing Modes: Post-Increment\n");
  LOG_printf(&LogMain,"%s",err?"TEST FAILED":"TEST PASSED");
  LOG_printf(&LogMain,"<DONE>");
}