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📄 dma2.c

📁 使用在TI 系列dsk5402 的很多可用例子
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/*
 *  Copyright 2003 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DSP/BIOS 4.90.150 04-08-03 (barracuda-m02)" */
/******************************************************************************\
*           Copyright (C) 2000 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... dma2.c
* DATE CREATED.. 01/11/2000
* LAST MODIFIED. 09/27/2000
\******************************************************************************/
#include <stdio.h>

#include <csl.h>
#include <csl_dma.h>
#include <csl_irq.h>

/*----------------------------------------------------------------------------*/
/* create a data from DMA transfer */

#define N       16

/* Place data in separate section to ensure placement */
/* within the DMA memory space defined for the device.*/
/* The address ranges chosen for this example in the  */
/* linker command file place src and dst within the   */
/* DMA memory map for the TMS320C5402. When modifying */
/* this example to run on a different C54x target,    */
/* please check the datasheet for your specific       */
/* device to make sure that the src and dst addresses */
/* for your transfer are assigned to a valid DMA      */
/* memory space.                                      */ 

/* All processing will be done in "taskFunc" which    */
/* has been statically configured as a DSPBIOS TSK    */
/* This is defined in the dma2.cdb file that is       */
/* included as one of the project files. This task    */
/* will automatically execute on exit from "main"     */

#pragma DATA_SECTION(src,"dmaMem")
Uint16 src[N];
    
#pragma DATA_SECTION(dst1,"dmaMem")
Uint16 dst1[N];

#pragma DATA_SECTION(dst2,"dmaMem")
Uint16 dst2[N];


/* In this example, we will be effecting a DMA   */
/* transfer from DATA to DATA space in internal  */
/* memory, using autoinitialization to peform    */
/* two transfers in multi-frame. We will use a   */
/* DMA interrupt to determine completion.        */

/* These are teh setting required in the DMA channel mode control */
/* register, DMMCR, to enable this transfer                       */

/*     DMMCR2 = 0xE145u                                           */ 
/*     #1100000100000101b                                         */
/*     ;1~~~~~~~~~~~~~~~ (AUTOINIT)     Autoinitialization enabled    */
/*     ;~1~~~~~~~~~~~~~~ (DINM)         Interrupts masked/enabled     */
/*     ;~~1~~~~~~~~~~~~~ (IMOD)         Int at end frame & end block  */
/*     ;~~~0~~~~~~~~~~~~ (CTMOD)        Multi-frame mode              */
/*     ;~~~~0~~~~~~~~~~~                N/A                           */
/*     ;~~~~~001~~~~~~~~ (SIND) Post increment src address    */
/*     ;~~~~~~~~01~~~~~~ (DMS)      Source in data space          */
/*     ;~~~~~~~~~~0~~~~~                N/A                           */
/*     ;~~~~~~~~~~~001~~ (DIND)         Post increment dst address    */
/*     ;~~~~~~~~~~~~~~01 (DMD)  Destination in data space     */

/* These are the values required for DMA symc and frame control   */
/* register, DMSFC                                                */
/*  DMSFC2 = 0x0000u                                              */
/*  #0000000000000000b                                            */
/*      ;0000~~~~~~~~~~~~ (DSYN)          No sync event               */
/*      ;~~~~0~~~~~~~~~~~ (DBLW)          Single-word mode            */
/*      ;~~~~~000~~~~~~~~                 N/A                         */
/*      ;~~~~~~~~00000000 (Frame Count) Frame Count = 0h (one frame)*/


/* Create a DMA configuration structure for the transfer */
/* using predefined CSL macros and symbolic constants    */

DMA_Config myconfig = { 
  1,                                   /* Priority */
  DMA_DMMCR_RMK(
    DMA_DMMCR_AUTOINIT_ON,
    DMA_DMMCR_DINM_ON,
    DMA_DMMCR_IMOD_FULL_ONLY,
    DMA_DMMCR_CTMOD_MULTIFRAME,
    DMA_DMMCR_SIND_POSTINC,
    DMA_DMMCR_DMS_DATA,
    DMA_DMMCR_DIND_POSTINC,
    DMA_DMMCR_DMD_DATA
  ),                                   /* DMMCR */
  DMA_DMSFC_RMK(
    DMA_DMSFC_DSYN_NONE,
    DMA_DMSFC_DBLW_OFF,
    DMA_DMSFC_FRAMECNT_OF(0)
  ),                                   /* DMSFC */
  (DMA_AdrPtr)&src[0],                 /* DMSRC  */
  (DMA_AdrPtr)&dst1[0],                /* DMDST  */
  N-1                                  /* DMCTR  */
};

/* Create a global configuration structure for autoinitialization */
DMA_GblConfig mygconf = {
  0,                                   /* Free   */
  0,                                   /* DMSRCP */
  0,                                   /* DMDSTP */
  0,                                   /* DMIDX0 */
  0,                                   /* DMIDX1 */
  0,                                   /* DMFRI0 */
  0,                                   /* DMFRI1 */
  (DMA_AdrPtr)&src[0],                 /* DMGSA  */
  (DMA_AdrPtr)&dst2[0],                /* DMGDA  */
    N-1,                               /* DMGCR  */
    0                                  /* DMGFR  */
};

/* Declare DMA Handle */
DMA_Handle myhDma;

/* Reference start of interrupt vector table  */
/* This symbol is defined in file vectors.s54 */
extern void VECSTART(void);

volatile Uint16 dmaCha2_xfr_cnt = 0;      
interrupt void dmaCha2Isr(void);
void taskFunc(void);


/*----------------------------------------------------------------------------*/
void main() {
  Uint16 i;
  
  /* Initialize CSL library, this step is required */
  CSL_init();

  /* Set IPTR to start of interrupt vector table */
  IRQ_setVecs((Uint16)(&VECSTART));

  /* Initialize source array and clear both destinations */
  for (i=0; i<= N-1; i++) {                  
     src[i] = 0xBABAu;
     dst1[i] = 0;    
     dst2[i] = 0;
  }
  /* Call example task/function */
  taskFunc(); 
}

/*----------------------------------------------------------------------------*/
void taskFunc(void) {

  Uint16 err = 0;
  Uint16 eventId, old_intm;  
  unsigned short i;

  printf("<DMA2>\n");


  /* Temporarily diasble all maskable interrupts */   
  old_intm = IRQ_globalDisable();

  /* Disable all DMA channels */
  DMA_RSET(DMPREC,0x0000u); 
   
  /* Open DMA channel 2 */
  myhDma = DMA_open(DMA_CHA2, 0);             
 
  /* Write values from DMA config structure to DMA channel */
  /* control registers                                     */
  DMA_config(myhDma, &myconfig); 

  /* Write values from global configuration to the DMA */
  /* global control registers                          */
  DMA_globalConfig(DMA_GBL_ALL, &mygconf);   
 
  /* Enable masking of DMA CHA 2 interrupt, by setting value  */
  /* of interrupt select field in the DMA priority and enable */
  /* control register, DMPREC                                 */
  DMA_FSET(DMPREC,INTOSEL,DMA_DMPREC_INTOSEL_CH2_CH3);

  /* Get Event ID associated with DMA channel 2 interrupt */
  eventId = DMA_getEventId(myhDma);    

  /* Clear any pending interrupts for DMA channel 2 */
  IRQ_clear(eventId); 

  /* Place ISR address at associated vector location */
  IRQ_plug(eventId, &dmaCha2Isr);

  /* Enable DMA channel 2 interrupt in interrupt mask register */
  IRQ_enable(eventId);   
   
  /* Enable all maskable interrupts */                                                                                 
  IRQ_globalEnable();

  /* Start DMa transfer */  
  DMA_start(myhDma);                                                                                                      
 
 
  /* Wait for DMa transfer complete */
  while(dmaCha2_xfr_cnt <= 1);

  /* Restore INTM to previous value */
  IRQ_globalRestore(old_intm);
    
  /* Check values at destination addresses */
  for (i = 0; i <= N-1; i++) {
    if ((dst1[i] != 0xBABAu) || (dst2[i] != 0xBABAu)) {
      ++err;
    }  
  }                                                           
  
  /* We are finished with DMA channel, so close it */
  DMA_close(myhDma); 
 
  printf ("Two multi-frame operations of DMA performed....\n");
  printf("%s\n",err?"TEST FAILED":"TEST PASSED");
}

/* The DMA Isr's have been statically configured using the DSPBIOS  */
/* HWI module in the DSPBIOS configuration tool. In addition this   */
/* interrupt has been configured to use the DSPBIOS dispatcher. The */
/* dispatcher will invoke this function, therefore this function    */
/* should not be declared using the interrupt keyword.              */
/*----------------------------------------------------------------------------*/
interrupt void dmaCha2Isr(void) {
  ++dmaCha2_xfr_cnt;  
   
  /* Stop DMA at end of second transfer */ 
  if (dmaCha2_xfr_cnt == 2) {
    DMA_stop(myhDma);
  }
}  

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