i2c_irq.s

Embest ATEB40x开发板部分测试程序

#------------------------------------------------------------------------------
#-	  ATMEL Microcontroller Software Support  -   ROUSSET -
#------------------------------------------------------------------------------
#- File source				: i2c_irq.s
#- Librarian				: Not applicable
#-
#- Treatment				: Assembler Timer Counter Interrupt Handler.
#-
#- 1.0 
#- 1.1 02/11/00 JPP     		: Green Hills	
#------------------------------------------------------------------------------
# Function :
# The handlers for each Timer Counter are stored in the table <TCHandlerTable>.
# When an interrupt occurs, the core branchs the channel corresponding
# assembler handler which manage the system ( core and AIC ) and branch to
# the corresponding C handler. This last can be defined by the C function
# <init_timer_irq>.
# Note in thumb mode, handler addresses are saved with bit 0 set. Then,
# you don't need to set it before execution of bx.
#------------------------------------------------------------------------------
#			AREA    AT91Lib, CODE, READONLY, INTERWORK


            .INCLUDE     "../../periph/aic/aic.inc"
            .INCLUDE     "../../periph/arm7tdmi/arm.inc"

   	    .GLOBAL	tc0_interrupt_handler
	    .EXTERN	I2C_line
	    .EXTERN	I2C_lineHandlerInt


tc0_interrupt_handler:
			
#- Adjust and save LR_irq in IRQ stack
            sub         r14, r14, #4
            stmfd       sp!, {r14}

#- Write in the IVR to support Protect Mode
#- No effect in Normal Mode
#- De-assert the NIRQ and clear the source in Protect Mode
            ldr         r14, =AIC_BASE
            str         r14, [r14, #AIC_IVR]

#- Save SPSR and r0 in IRQ stack
            mrs         r14, SPSR
            stmfd       sp!, {r0, r14}

#- Enable Interrupt and Switch in SYS Mode
            mrs         r0, CPSR
            bic         r0, r0, #I_BIT
            orr         r0, r0, #ARM_MODE_SYS
            msr         CPSR_c, r0

#- Save scratch/used registers and LR in User Stack
            stmfd       sp!, { r1-r3, r12, r14}
            	

			ldr 			r0,=I2C_line
#- Load the address of the Timer Counter Handler Table
			ldr			r1, =I2C_lineHandlerInt

			mov			r14, pc
			bx			r1
#- Restore scratch/used registers and LR from User Stack
            ldmia       sp!, { r1-r3, r12, r14}
            
#- Disable Interrupt and switch back in IRQ mode
            mrs         r0, CPSR
            bic         r0, r0, #ARM_MODE_SYS
            orr         r0, r0, #I_BIT | ARM_MODE_IRQ
            msr         CPSR_c, r0

#- Mark the End of Interrupt on the AIC
            ldr         r0, =AIC_BASE
            str         r0, [r0, #AIC_EOICR]

#- Restore SPSR_irq and r0 from IRQ stack
            ldmia       sp!, {r0, r14}
            msr         SPSR_cxsf, r14

#- Restore adjusted  LR_irq from IRQ stack directly in the PC
            ldmia       sp!, {pc}^


			.END


#END