hardware.asm

SPBA01B是由凌阳公司开发的可级连的单片I0、总线扩展芯片。它具有使用简单、扩展能力强、性价比高的特点。本程序实现了如何利用SPBA01B来对SPCE061A进行IO扩展。

F_SP_ReadQueue_NIC:
F_SP_ReadQueue_NIC_A2000:
F_SP_ReadQueue_NIC_S480:
F_SP_ReadQueue_NIC_S240:
F_SP_ReadQueue_NIC_MS01:
F_SP_ReadQueue_NIC_DVR:
		R2 = [R_ReadIndex]
		cmp R2,[R_WriteIndex]
		je	L_RQ_QueueEmpty?

		R2 += R_Queue				// get queue data index
		R1 = [R2]
L_RQ_QueueEmpty?:
		RETF
		
///////////////////////////////////////////
// Function: Put a data to Queue
// R1: Input
// Destory: R1,R2
///////////////////////////////////////////	
F_SP_WriteQueue_A2000:
F_SP_WriteQueue_S480:
F_SP_WriteQueue_S240:
F_SP_WriteQueue_MS01:
F_SP_WriteQueue_DVR:
F_SP_WriteQueue:
		R2 = [R_WriteIndex] 			// put data to queue
		R2 += R_Queue
		[R2] = R1

		R2 = [R_WriteIndex]
		R2 += 1
		cmp	R2, C_QueueSize
		jne	L_WQ_NotQueueBottom
		R2 = 0
L_WQ_NotQueueBottom:
		[R_WriteIndex] = R2
		RETF

		
///////////////////////////////////////////
// Function: Test Queue Status
// o/p: R1
// Destory: R1
///////////////////////////////////////////	
F_SP_TestQueue_A2000:
F_SP_TestQueue_S480:
F_SP_TestQueue_S240:
F_SP_TestQueue_MS01:
F_SP_TestQueue_DVR:
F_SP_TestQueue:
		//... Test Queue Empty ...
		R1 = [R_ReadIndex] 
		cmp R1,[R_WriteIndex] 
		je	L_TQ_QueueEmpty 

		//... Test Queue Full ...
		R1 = [R_ReadIndex] 				// For N Queue Full: 1.R=0 and W=N-1 2. R<>0 and W=R-1 
		jnz	L_TQ_JudgeCond2 
		R1 = [R_WriteIndex] 
		cmp	R1, C_QueueSize-1 			// Cond1
		je	L_TQ_QueueFull 			
L_TQ_JudgeCond2:		
		R1 = [R_ReadIndex] 
		R1 -=1 
		cmp R1,[R_WriteIndex] 
		je	L_TQ_QueueFull 	

		r1 = 0 							// not Full, not empty
		retf 
L_TQ_QueueFull:
		r1 = 1 							// full
		retf 
L_TQ_QueueEmpty:
		r1 = 2 							// empty
		retf 



////////////////////////////////////////////////////////////////// 
// Function: I/O Port A configuration
// 	void SP_Inti_IOA(int Dir, int Data, int Attrib)
//////////////////////////////////////////////////////////////////  
_SP_Init_IOA: .PROC
		PUSH BP TO [SP] 
        BP = SP + 1 
		PUSH R1 TO [SP] 
		R1 = [BP+3] 						// Port direction
		[P_IOA_Dir] = R1 
		R1 = [BP+4] 
		[P_IOA_Data] = R1 
		R1 = [BP+5] 
		[P_IOA_Attrib] = R1 
		
		POP R1 FROM [SP] 
        POP BP FROM [SP] 
        RETF 
		.ENDP

////////////////////////////////////////////////////////////////// 
// Function: I/O Port B configuration
//  void SP_Inti_IOB(int Dir, int Data, int Attrib)
//////////////////////////////////////////////////////////////////    
_SP_Init_IOB: .PROC
		PUSH BP TO [SP] 
        BP = SP + 1 
		PUSH R1 TO [SP] 
		R1 = [BP+3] 						// Port direction
		[P_IOB_Dir] = R1 
		R1 = [BP+4] 
		[P_IOB_Data] = R1 
		R1 = [BP+5] 
		[P_IOB_Attrib] = R1 
		
		POP R1 FROM [SP] 
        POP BP FROM [SP] 
        RETF 
		.ENDP

////////////////////////////////////////////////////////////////// 
// Function: Get data from port
// 	int SP_Import(unsigned int Port)
//////////////////////////////////////////////////////////////////  
_SP_Import: .PROC
        PUSH BP TO [SP] 
        BP = SP + 1 
        
		R1 = [BP+3]  						// Port Number
		R1 = [R1]  
				
        POP BP FROM [SP] 
        RETF 
		.ENDP

_SP_Export: .PROC
        PUSH BP,BP TO [SP] 
        BP = SP + 1 
		PUSH R1,R2 TO [SP] 
		R1 = [BP+3]  						// Port Number
		R2 = [BP+4]  						// Value
		[R1] = R2  
		POP R1,R2 FROM [SP] 
        POP BP,BP FROM [SP] 
        RETF         
 		.ENDP


//////////////////////////////////////////////////////
// SACM_GetResource(Address,Page,offset) 
//////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////// 
// Function: Get data from resource(ROM area)
// 	int SP_GetResource(int Addr, int Page)
//////////////////////////////////////////////////////////////////  
_SP_GetResource:	.PROC
		push bp to [sp] 
		bp = sp + 1 
		
		r1 = [bp+3] 					// Address
		r2 = [bp+4] 					// Page
		
		r2 = r2 lsl 4 					// Prepare Page for SR
		r2 = r2 lsl 4 
		r2 = r2 lsl 2 
		
		sr &= 0x03f 					// Change Page
        r2 |=sr 						//
        sr = r2 						//
  
  		r1 = D:[r1] 					// Get data
       
		pop	 bp from [sp] 
		retf 
		.ENDP 

////////////////////////////////////////////////////////////////// 
// Function: Delay
// 	void SP_Delay()
//////////////////////////////////////////////////////////////////  
_SP_Delay:	.PROC
F_SP_Delay:
		// User define
		retf 
		.ENDP




.PUBLIC F_SP_SACM_A2000_Init_
.PUBLIC F_SP_SACM_S480_Init_
.PUBLIC F_SP_SACM_S240_Init_

.PUBLIC F_SP_SACM_MS01_Init_
.PUBLIC F_SP_PlayMode0_
.PUBLIC F_SP_PlayMode1_    
.PUBLIC F_SP_PlayMode2_  
.PUBLIC F_SP_PlayMode3_   

.PUBLIC F_SP_SACM_DVR_Init_
.PUBLIC F_SP_SACM_DVR_Rec_Init_
.PUBLIC F_SP_SACM_DVR_Play_Init_

///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_A2000_Initial() 
//			or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
//			initial subroutine. (H/W setting part) 
//
//	Ex: F_SACM_A2000_Initial:
//			...
//			call F_SP_SACM_A2000_Init_	: S480/S240/MS01 is same
//			...
//			retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:	
		R1=0x0000;                      // 24MHz, Fcpu=Fosc
        [P_SystemClock]=R1           	//  Frequency 20MHz
        R1 = 0x0030                     // TimerA CKA=Fosc/2 CKB=1 Tout:off
        [P_TimerA_Ctrl] = R1			// Initial Timer A
        R1 = 0xfd00                  	// 16K
        [P_TimerA_Data] = R1 
        R1 = 0x00A8                     // Set the DAC Ctrl
        [P_DAC_Ctrl] = R1
        R1 = 0xffff
        
        [P_INT_Clear] = R1          	// Clear interrupt occuiped events
        R1 =0x0000						// 
        
        
        R1 = [R_InterruptStatus]		//
        R1 |= C_FIQ_TMA					// Enable Timer A FIQ
        //R1 |= C_IRQ4_1KHz
        [R_InterruptStatus] = R1		//
        [P_INT_Ctrl] = R1				//

		RETF


//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial() 
//			or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
        R1 = 0x0000						// 24MHz Fosc
        [P_SystemClock]=R1          	// Initial System Clock
        R1=0x0030                       // TimerA CKA=Fosc/2 CKB=1 Tout:off
        [P_TimerA_Ctrl]=R1				// Initial Timer A
        R1 = 0xfd00                  	// 16K
        [P_TimerA_Data]=R1
        R1 = 0x00A8						// 
        [P_DAC_Ctrl] = R1				//
        
        R1 = 0xffff
        [P_INT_Clear] = R1          	// Clear interrupt occuiped events
        R1 = [R_InterruptStatus]		//
        R1 |= C_FIQ_TMA					// Enable Timer A FIQ
        R1 |= C_IRQ4_1KHz				// Enable 1KHz IRQ4 for S480 decoder
        [R_InterruptStatus] = R1		//
        [P_INT_Ctrl] = R1				//
        RETF

//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial() 
//			or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:	
		R1=0x0020;	
		[P_SystemClock]=R1
		R1 = 0x00A8;					// 
		[P_DAC_Ctrl]= R1
		R1 = 0x0030;               	// TimerA CKA=Fosc/2 CKB=1 Tout:off
        [P_TimerA_Ctrl] = R1;
		R1 = 0xfe00;                    // 24K
    	[P_TimerA_Data] = R1;		
        R1 = 0xffff
        [P_INT_Clear] = R1          	// Clear interrupt occuiped events
        R1 = [R_InterruptStatus]		//
        R1 |= C_FIQ_TMA					// Enable Timer A FIQ
        [R_InterruptStatus] = R1		//
        [P_INT_Ctrl] = R1				//
        RETF

//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial() 
//			or F_SACM_MS01_Initial:
//
//	Ex: F_SACM_MS01_Initial:
//			...
//			call F_SP_SACM_MS01_Init_
//			call F_SP_Play_Mode0/1/2/3	->0,1,2,3 depending on the para1
//			...
//			retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:	
		R1 = 0x0000;                    // 24MHz, Fcpu=Fosc
        [P_SystemClock] = R1;        	// Initial System Clock
        R1 = 0x0030;                    // TimerA CKA=Fosc/2 CKB=1 Tout:off
        [P_TimerA_Ctrl] = R1			// Initial Timer A
        R1 = 0x0003
        [P_TimerB_Ctrl] = R1;
        R1 = 0xFFFF 					// Any time for ADPCM channel 0,1
        [P_TimerB_Data] = R1			// Initial Timer B -> 8192	
        
		R1 = 0xffff
        [P_INT_Clear] = R1          	// Clear interrupt occuiped events
        RETF

//........................................
F_SP_PlayMode0_:						// with F_SP_SACM_MS01_Initial
		R1 = 0x0006
        [P_DAC_Ctrl] = R1
        R1 = 0xFE00
        [P_TimerA_Data] = R1 			//
        R1 = [R_InterruptStatus] 		//
        R1 = C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
        [R_InterruptStatus] = R1 		//
        [P_INT_Ctrl] = R1				//
        RETF

F_SP_PlayMode1_:						// with F_SP_SACM_MS01_Initial
		R1 = 0x00A8
        [P_DAC_Ctrl] = R1
        R1 = 0xFE00
        [P_TimerA_Data] = R1 			//
        R1 = [R_InterruptStatus] 		//
        R1 = C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
        [R_InterruptStatus] = R1 		//
        [P_INT_Ctrl] = R1				//
        RETF


F_SP_PlayMode2_:	 						// with F_SP_SACM_MS01_Initial
		R1 = 0x00A8
        [P_DAC_Ctrl] = R1
        R1 = 0xFD9A
        [P_TimerA_Data] = R1 				//
        R1 = [R_InterruptStatus] 			//
        R1 = C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
        [R_InterruptStatus] = R1 			//
        [P_INT_Ctrl] = R1					//
        RETF

      
F_SP_PlayMode3_:							// with F_SP_SACM_MS01_Initial
		R1 = 0x00A8
        [P_DAC_Ctrl] = R1
        R1 = 0xFD00
        [P_TimerA_Data] = R1 			//
        R1 = [R_InterruptStatus] 		//
        R1 = C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
	    [R_InterruptStatus] = R1 		//
        [P_INT_Ctrl] = R1				//
        RETF
        
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial() 
//			or F_SACM_MS01_Initial:
//
//	Ex: F_SACM_DVR_Initial:
//			...
//			call F_SP_SACM_DVR_Init_
//			call F_SP_Play_Mode0/1/2/3	->0,1,2,3 depending on the para1
//			...
//			retf
//	Ex1:
//		F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
//			...
//			call F_SP_SACM_DVR_Rec_Init
//			...
//			retf
//	Ex2:
//		F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
//			...
//			call F_SP_SACM_DVR_Play_Init_
//			...
//			retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
        r1 = 0x0000;                    // 24MHz, Fcpu=Fosc
        [P_SystemClock] = r1;           //  Frequency 20MHz
        r1 = 0x0030;                    // TimerA CKA=Fosc/2 CKB=1 Tout:off
        [P_TimerA_Ctrl] = r1;
        r1 = 0xfa00;                    // 8K @ 24.576MHz
        //r1 = 0xfb1d;                  // 8K @ 20MHz
        [P_TimerA_Data] = r1;
        r1 = 0x0035;                    // ADINI should be open (107)
        [P_ADC_Ctrl] = r1;
        r1 = 0x00A8;                    // Set the DA Ctrl
        [P_DAC_Ctrl] = r1;
        
        r1 = 0xffff;
        [P_INT_Clear] = r1;          	// Clear interrupt occuiped events
        
        R1 = [R_InterruptStatus]		//
        R1 |= C_FIQ_TMA					// Enable Timer A FIQ
        [R_InterruptStatus] = R1		//
        [P_INT_Ctrl] = R1				//
        
        RETF





F_SP_SACM_DVR_Rec_Init_:					// call by SACM_DVR_Record / SACM_DVR_InitEncoder
		r1 = 0x0035;  					//mic input
        //r1 = 0x0037					//line_in input
        [P_ADC_Ctrl] = r1;       		//enable ADC
        
        R1=0xfe00;                     	//24K @ 24.576MHz
        [P_TimerA_Data] = r1 
		RETF

F_SP_SACM_DVR_Play_Init_:
	    r1 = 0x0000						// call by SACM_DVR_Stop / SACM_DVR_Play
        [P_ADC_Ctrl] = r1;       		// Disable ADC
        
        r1 = 0xfd00;                	// 16K @ 24.576MHz
        [P_TimerA_Data] = r1;
        RETF

//////////////////////////////////////////////////////////////////
// Functions: Reserve old defintion
// Note: Some user who use old library may use the old name
//////////////////////////////////////////////////////////////////
.PUBLIC	F_RampUpDAC1 
.PUBLIC	F_RampDnDAC1 
.PUBLIC	F_RampUpDAC2 
.PUBLIC	F_RampDnDAC2 
.PUBLIC	_STD_RampUpDAC1 
.PUBLIC	_STD_RampDnDAC1 
.PUBLIC	_STD_RampUpDAC2 
.PUBLIC	_STD_RampDnDAC2 
.DEFINE F_RampUpDAC1 F_SP_RampUpDAC1
.DEFINE F_RampDnDAC1 F_SP_RampDnDAC1
.DEFINE F_RampUpDAC2 F_SP_RampUpDAC2
.DEFINE F_RampDnDAC2 F_SP_RampDnDAC2
.DEFINE _STD_RampUpDAC1 _SP_RampUpDAC1
.DEFINE _STD_RampDnDAC1 _SP_RampDnDAC1
.DEFINE _STD_RampUpDAC2 _SP_RampUpDAC2
.DEFINE _STD_RampDnDAC2 _SP_RampDnDAC2


///////////////////////////////////////////////////////////////////

                
//========================================================================================        
// End of hardware.asm
//========================================================================================