config_id.h

基于PIC18F6720MCU开发的手持式POS机的原码

//=============================================================================
// Software License Agreement
//
// The software supplied herewith by Microchip Technology Incorporated 
// (the "Company") for its PICmicro?Microcontroller is intended and 
// supplied to you, the Company customer, for use solely and 
// exclusively on Microchip PICmicro Microcontroller products. The 
// software is owned by the Company and/or its supplier, and is 
// protected under applicable copyright laws. All rights are reserved. 
// Any use in violation of the foregoing restrictions may subject the 
// user to criminal sanctions under applicable laws, as well as to 
// civil liability for the breach of the terms and conditions of this 
// license.
//
// THIS SOFTWARE IS PROVIDED IN AN "AS IS" CONDITION. NO WARRANTIES, 
// WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED 
// TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 
// PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, 
// IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR 
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
//=============================================================================
//	Filename:	config_ID.h
//=============================================================================
//	Author: 		Elf Liu
//	Company:		Microchip Technology Inc.
//	Revision:		1.00
//	Date:			03/25/2003
//=============================================================================
//	Compiled using MPLAB-C18 V2.00
//	Include Files:	None
//=============================================================================
//
//	1. Configuration Registers quotation in MPLAB-C18
//	   with all bit definitions
//	2. Device ID quotation in MPLAB-C18
//	3. User's ID (ID locations) quotations in MPLAB-C18
//
//=============================================================================

//============================================================================
//
//			Configuration Registers
//
//============================================================================
//
//----------------------------------------------------------------------------
// 		Bit Definitions for Configuration Registers
//----------------------------------------------------------------------------

// Configuration Register 1 High (300001H)
#define	OSCS_EN 	0b00000000	// Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)
#define OSCS_DIS	0b00100000	// Oscillator system clock switch option is disabled (main oscillator is source)

#define RC_RA6		0b00000111	// RC oscillator w/ OSC2 configuration as RA6
#define	HS_PLL		0b00000110	// HS oscillator w/ PLL enabled/Clock frequency = 4*Fosc
#define EC_RA6		0b00000101	// EC oscillator w/ OSC2 configured as RA6
#define EC_div4		0b00000100	// EC oscillator w/ OSC2 configured as divide-by-4 clock output
#define RC_div4		0b00000011	// RC oscillator w/ OSC2 configured as divide-by-4 clock output
#define	HS		0b00000010	// HS oscillator
#define XT		0b00000001	// XT oscillator
#define	LP		0b00000000	// LP oscillator

// Configuration Register 2 Low (300002H)
#define VBOR_25		0b00001100	// VBOR set to 2.5V
#define VBOR_27		0b00001000	// VBOR set to 2.7V
#define VBOR_42		0b00000100	// VBOR set to 4.2V
#define VBOR_45		0b00000000	// VBOR set to 4.5V

#define BOR_EN		0b00000010	// Brown-out Reset enabled
#define BOR_DIS		0b00000000	// Brown-out Reset disabled

#define PWRT_EN		0b00000000	// PWRT enabled
#define PWRT_DIS	0b00000001	// PWRT disabled

// Configuration Register 2 High (300003H)
#define WDT_PS_128	0b00001110	// Watchdog Timer Postscale is 1:128
#define WDT_PS_64	0b00001110	// Watchdog Timer Postscale is 1:64
#define WDT_PS_32	0b00001110	// Watchdog Timer Postscale is 1:32
#define WDT_PS_16	0b00001110	// Watchdog Timer Postscale is 1:16
#define WDT_PS_8	0b00001110	// Watchdog Timer Postscale is 1:8
#define WDT_PS_4	0b00001110	// Watchdog Timer Postscale is 1:4
#define WDT_PS_2	0b00001110	// Watchdog Timer Postscale is 1:2
#define WDT_PS_1	0b00001110	// Watchdog Timer Postscale is 1:1

#define WDT_EN		0b00000001	// WDT enabled
#define WDT_DIS		0b00000000	// WDT disabled (control is placed on the SWDTEN bit)

// Configuration Register 3 Low (300004H)
#define WAIT_EN		0b00000000	// Wait selections unavailable for Table Reads and Table Writes are determined by WAIT1:WAIT0 bits
#define	WAIT_DIS	0b10000000	// Wait selections unavailable for Table Reads and Table Writes

#define	MICROCONTROLLER			0b00000011	// Microcontroller mode
#define MICROPROCESSOR			0b00000010	// Microprocessor mode
#define	MICROPROCESSOR_BOOT		0b00000001	// Microprocessor with Boot Block mode
#define	EXTENDED_MICROCONTROLLER	0b00000000	// Extended Microcontroller mode

// Configuration Register 3 High (300005H)
#define CCP2MX_RC1	0b00000001	// CCP2 input/output is multiplexed with RC1
#define CCP2MX_RE7	0b00000000	// CCP2 input/output is multiplexed with RE7

// Configuration Register 4 Low (300006H)
#define DEBUG_EN	0b00000000	// Background Debugger enabled
#define DEBUG_DIS	0b10000000	// Background Debugger disabled

#define LVP_EN		0b00000100	// Low Voltage ICSP enabled
#define LVP_DIS		0b00000000	// Low Voltage ICSP disabled

#define STVR_EN		0b00000001	// Stack full/underflow will cause RESET
#define STVR_DIS	0b00000000	// Stack full/underflow will not cause RESET

// Configuration Register 5 Low (300008H)
#define CP7_EN		0b00000000	// Block 7 (01C000-01FFFFh) code protected
#define CP7_DIS		0b10000000	// Block 7 (01C000-01FFFFh) not code protected
#define CP6_EN		0b00000000	// Block 6 (018000-01BFFFh) code protected
#define CP6_DIS		0b01000000	// Block 6 (018000-01BFFFh) not code protected
#define CP5_EN		0b00000000	// Block 5 (014000-017FFFh) code protected
#define CP5_DIS		0b00100000	// Block 5 (014000-017FFFh) not code protected
#define CP4_EN		0b00000000	// Block 4 (010000-013FFFh) code protected
#define CP4_DIS		0b00010000	// Block 4 (010000-013FFFh) not code protected
#define CP3_EN		0b00000000	// Block 3 (00C000-00FFFFh) code protected
#define CP3_DIS		0b00001000	// Block 3 (00C000-00FFFFh) not code protected
#define CP2_EN		0b00000000	// Block 2 (008000-00BFFFh) code protected
#define CP2_DIS		0b00000100	// Block 2 (008000-00BFFFh) not code protected
#define CP1_EN		0b00000000	// Block 1 (004000-007FFFh) code protected
#define CP1_DIS		0b00000010	// Block 1 (004000-007FFFh) not code protected
#define CP0_EN		0b00000000	// Block 0 (002000-003FFFh) code protected
#define CP0_DIS		0b00000001	// Block 0 (002000-003FFFh) not code protected

#define CP_ALL_EN	CP7_EN&CP6_EN&CP5_EN&CP4_EN&CP3_EN&CP2_EN&CP1_EN&CP0_EN
#define CP_ALL_DIS	CP7_DIS&CP6_DIS&CP5_DIS&CP4_DIS&CP3_DIS&CP2_DIS&CP1_DIS&CP0_DIS

// Configuration Register 5 High (300009H)
#define CPD_EN		0b00000000	// Data EEPROM code protected
#define CPD_DIS		0b10000000	// Data EEPROM not code protected

#define CPB_EN		0b00000000	// Boot Block (000000-0001FFh) code protected
#define CPB_DIS		0b01000000	// Boot Block (000000-0001FFh) not code protected

// Configuration Register 6 Low (30000AH)
#define WR7_EN		0b00000000	// Block 7 (01C000-01FFFFh) write protected
#define WR7_DIS		0b10000000	// Block 7 (01C000-01FFFFh) not write protected
#define WR6_EN		0b00000000	// Block 6 (018000-01BFFFh) write protected
#define WR6_DIS		0b01000000	// Block 6 (018000-01BFFFh) not write protected
#define WR5_EN		0b00000000	// Block 5 (014000-017FFFh) write protected
#define WR5_DIS		0b00100000	// Block 5 (014000-017FFFh) not write protected
#define WR4_EN		0b00000000	// Block 4 (010000-013FFFh) write protected
#define WR4_DIS		0b00010000	// Block 4 (010000-013FFFh) not write protected
#define WR3_EN		0b00000000	// Block 3 (00C000-00FFFFh) write protected
#define WR3_DIS		0b00001000	// Block 3 (00C000-00FFFFh) not write protected
#define WR2_EN		0b00000000	// Block 2 (008000-00BFFFh) write protected
#define WR2_DIS		0b00000100	// Block 2 (008000-00BFFFh) not write protected
#define WR1_EN		0b00000000	// Block 1 (004000-007FFFh) write protected
#define WR1_DIS		0b00000010	// Block 1 (004000-007FFFh) not write protected
#define WR0_EN		0b00000000	// Block 0 (002000-003FFFh) write protected
#define WR0_DIS		0b00000001	// Block 0 (002000-003FFFh) not write protected

#define WR_ALL_EN	WR7_EN&WR6_EN&WR5_EN&WR4_EN&WR3_EN&WR2_EN&WR1_EN&WR0_EN
#define WR_ALL_DIS	WR7_DIS&WR6_DIS&WR5_DIS&WR4_DIS&WR3_DIS&WR2_DIS&WR1_DIS&WR0_DIS

// Configuration Register 6 High (30000BH)
#define WRTD_EN		0b00000000	// Data EEPROM write protected
#define WRTD_DIS	0b10000000	// Data EEPROM not write protected

#define WRTB_EN		0b00000000	// Boot Block (000000-0001FFh) write protected
#define WRTB_DIS	0b01000000	// Boot Block (000000-0001FFh) not write protected

#define WRTC_EN		0b00000000	// Configuration Registers (300000-3000FFFh) write protected
#define WRTC_DIS	0b00100000	// Configuration Registers (300000-3000FFFh) not write protected

// Configuration Register 7 Low (30000CH)
#define EBTR7_EN	0b00000000	// Block 7 (01C000-01FFFFh) protected from Table Reads executed in other blocks
#define EBTR7_DIS	0b10000000	// Block 7 (01C000-01FFFFh) not protected from Table Reads executed in other blocks
#define EBTR6_EN	0b00000000	// Block 6 (018000-01BFFFh) protected from Table Reads executed in other blocks
#define EBTR6_DIS	0b01000000	// Block 6 (018000-01BFFFh) not protected from Table Reads executed in other blocks
#define EBTR5_EN	0b00000000	// Block 5 (014000-017FFFh) protected from Table Reads executed in other blocks
#define EBTR5_DIS	0b00100000	// Block 5 (014000-017FFFh) not protected from Table Reads executed in other blocks
#define EBTR4_EN	0b00000000	// Block 4 (010000-013FFFh) protected from Table Reads executed in other blocks
#define EBTR4_DIS	0b00010000	// Block 4 (010000-013FFFh) not protected from Table Reads executed in other blocks
#define EBTR3_EN	0b00000000	// Block 3 (00C000-00FFFFh) protected from Table Reads executed in other blocks
#define EBTR3_DIS	0b00001000	// Block 3 (00C000-00FFFFh) not protected from Table Reads executed in other blocks
#define EBTR2_EN	0b00000000	// Block 2 (008000-00BFFFh) protected from Table Reads executed in other blocks
#define EBTR2_DIS	0b00000100	// Block 2 (008000-00BFFFh) not protected from Table Reads executed in other blocks
#define EBTR1_EN	0b00000000	// Block 1 (004000-007FFFh) protected from Table Reads executed in other blocks
#define EBTR1_DIS	0b00000010	// Block 1 (004000-007FFFh) not protected from Table Reads executed in other blocks
#define EBTR0_EN	0b00000000	// Block 0 (002000-003FFFh) protected from Table Reads executed in other blocks
#define EBTR0_DIS	0b00000001	// Block 0 (002000-003FFFh) not protected from Table Reads executed in other blocks

#define EBTR_ALL_EN	EBTR7_EN&EBTR6_EN&EBTR5_EN&EBTR4_EN&EBTR3_EN&EBTR2_EN&EBTR1_EN&EBTR0_EN
#define EBTR_ALL_DIS	EBTR7_DIS&EBTR6_DIS&EBTR5_DIS&EBTR4_DIS&EBTR3_DIS&EBTR2_DIS&EBTR1_DIS&EBTR0_DIS

// Configuration Register 7 High (30000DH)
#define EBTRB_EN	0b00000000	// Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks
#define EBTRB_DIS	0b01000000	// Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks

//----------------------------------------------------------------------------------------------------------------------------------
/***************** Quotations - Example

#pragma romdata CONFIG
rom const unsigned CONFIG_1H = 0b00100010;	// Main Oscillator is HS no PLL
rom const unsigned CONFIG_2L = 0b00000001;	// BOR and PWRT disabled
rom const unsigned CONFIG_2H = 0b00000000;	// WDT dsiabled
rom const unsigned CONFIG_3L = 0b10000011;	// Wait selection Unavailable
						// Microcontroller mode
rom const unsigned CONFIG_3H = 0b00000000;	// CCP2 multiplex with RE7
rom const unsigned CONFIG_4L = 0b00000000;	// Background enable, LVP disable, STVREN disable
rom const unsigned CONFIG_5L = 0b11111111;	// Block 0~7 not code protected
rom const unsigned CONFIG_5H = 0b11000000;	// Data EEPROM and Boot block not code protected
rom const unsigned CONFIG_6L = 0b00000000;	// Block 0~7 write protected
rom const unsigned CONFIG_6H = 0b00000000;	// Data EEPROM, Boot block and Configuration Register write protected
rom const unsigned CONFIG_7L = 0b00000000;	// Block 0~7 protected from Table Reads in other blocks
rom const unsigned CONFIG_7H = 0b00000000;	// Boot block protected from Table Read in other blocks
#pragma romdata

****************************************/
//------------------------------------------------------------------------------------------------------------------------------------

//============================================================================
//
//			DEVICE ID REGISTERS
//
//		Usually for factory use only
//		Address 3FFFFEh - 3FFFFFh
//
//============================================================================

/********************** Quotation - Example
#pragma romdata DEVID
rom const unsigned char DEV_ID1 = 0b00011111;
rom const unsigned char DEV_ID2 = 0b11111111;
#pragma romdata
******************************************/

//============================================================================
//
//			ID LOCATIONS
//
//============================================================================
//
//		User used for code identification numbers
//		Memory address: 200000h - 200007h
//
//----------------------------------------------------------------------------

/********************** Quotation - Example
#pragma romdata IDLOCS
rom const unsigned char ID_LOC_1 = 0x01;
rom const unsigned char ID_LOC_2 = 0x23;
rom const unsigned char ID_LOC_3 = 0x45;
rom const unsigned char ID_LOC_4 = 0x67;
rom const unsigned char ID_LOC_5 = 0x89;
rom const unsigned char ID_LOC_6 = 0xAB;
rom const unsigned char ID_LOC_7 = 0xCD;
rom const unsigned char ID_LOC_8 = 0xEF;
#pragma romdata
******************************************/