dac8811.asm

Interfacing the DAC8811 to the MSP430F449

;*********************************************************************************************
; MSP430F449 Demo - SPI Communication with DAC8811 SPI function Using HPA449 v1.1
;
; Assembled with IAR Embedded Workbench for MSP430 Kickstart
;
; Author: Jojo Parguian
;          	HPA/DAP 
; Company: Texas Instruments, Inc.
;
; Used:
;        HPA449 V1.1
;        DAC8811 EVM Rev 1
;
; Notes: 
;*********************************************************************************************
#include   "msp430x44x.h"         // Standard Equations
#include   "legal.asm"
#include   "readme.asm"
#define      DATASPI  R9
/************************************************************
* Pin Assignment - GPIO Definitions
************************************************************/
/* J2 Connections */
#define CSb              0x40  /* P2.6 */
/************************************************************
* Miscellaneous MSP430 Register Definitions 
************************************************************/
#define SPI              0x038

;---------------------------------------------------------------------------
; 16-bit Unipolar Sine Lookup table with 256 steps
;---------------------------------------------------------------------------
          ORG   01000h
;---------------------------------------------------------------------------
Sin_tab     DW	32768,33572,34376,35178,35980,36779,37576,38370,39161,39947,40730,41507,42280
	  DW	43046,43807,44561,45307,46047,46778,47500,48214,48919,49614,50298,50972,51636
	  DW	52287,52927,53555,54171,54773,55362,55938,56499,57047,57579,58097,58600,59087
	  DW	59558,60013,60451,60873,61278,61666,62036,62389,62724,63041,63339,63620,63881
	  DW	64124,64348,64553,64739,64905,65053,65180,65289,65377,65446,65496,65525,65535
	  DW	65525,65496,65446,65377,65289,65180,65053,64905,64739,64553,64348,64124,63881
	  DW	63620,63339,63041,62724,62389,62036,61666,61278,60873,60451,60013,59558,59087
	  DW	58600,58097,57579,57047,56499,55938,55362,54773,54171,53555,52927,52287,51636
	  DW	50972,50298,49614,48919,48214,47500,46778,46047,45307,44561,43807,43046,42280
	  DW	41507,40730,39947,39161,38370,37576,36779,35980,35178,34376,33572,32768,31964
	  DW	31160,30358,29556,28757,27960,27166,26375,25589,24806,24029,23256,22490,21729
	  DW	20975,20229,19489,18758,18036,17322,16617,15922,15238,14564,13900,13249,12609
	  DW	11981,11365,10763,10174,9598,9037,8489,7957,7439,6936,6449,5978,5523,5085,4663
	  DW	4258,3870,3500,3147,2812,2495,2197,1916,1655,1412,1188,983,797,631,483,356,247
	  DW	159,90,40,11,1,11,40,90,159,247,356,483,631,797,983,1188,1412,1655,1916,2197
	  DW	2495,2812,3147,3500,3870,4258,4663,5085,5523,5978,6449,6936,7439,7957,8489,9037
	  DW	9598,10174,10763,11365,11981,12609,13249,13900,14564,15238,15922,16617,17322
	  DW	18036,18758,19489,20229,20975,21729,22490,23256,24029,24806,25589,26375,27166
                DW	27960,28757,29556,30358,31160,31964,32768
;------------------------------------------------------------------------------ 
            ORG     0F000h
;------------------------------------------------------------------------------ 
;************************************************************************
;Program Code                    
;************************************************************************
           RSEG CODE
;************************************************************************ 
RESET  mov.w   #0A00h,SP                          	; Initialize stack-pointer
            call    #Init_Sys                           	; Initialize system
            clr.w   R6
            bic.b   #0FFh,&P1OUT
Write_Data  
            mov.w   #0FFh,R6                            	; 256 Sample Counter
            mov.w   #0,R5                               	; Table pointer
Again
            mov.w   Sin_tab(R5),DATASPI               ;Sine Table Data
            swpb    DATASPI                             	; MSB first
            bic.b   #CSb, &P2OUT                      	; Assert CS_
            mov.b   DATASPI,&U1TXBUF                 ; Transmit data
WaitXMT0
            bit.b   #UTXIFG1, &IFG2                	; TXBUF ready?
            jnc     WaitXMT0
            swpb    DATASPI                             	; LSB next
            mov.b   DATASPI,&U1TXBUF
WaitXMT1
            bit.b   #UTXIFG1, &IFG2                 	; TXBUF ready?
            jnc     WaitXMT1
            incd.w  R5                                  	; increment table pointer
            sub.w   #1,R6                               	; decrement sample counter
            bis.b   #CSb, &P2OUT                        	; deassert CS_
            and.w   #0FFh,R6                            	; Check sample counter if 256
            jnz     Again                               	; Do another sample
            jmp     Write_Data                          	; Another cycle
           
;*******************************
; Clear TX Flag
;*******************************
CLEAR0		 
           bit.b #UTXIFG0,&IFG1                           	; TXBUF ready?
           jnc CLEAR0                                     	; 1 = ready
           bic.b #UTXIFG0,&IFG1
           ret

;*******************************
; Clear TX Flag
;*******************************
CLEAR1		 
           bit.b #UTXIFG1,&IFG2                           	; TXBUF ready?
           jnc CLEAR1                                     	; 1 = ready
           bic.b #UTXIFG1,&IFG2
           ret
           
;************************************************************************
Init_Sys;  Modules and Controls Registers set-up subroutine
;************************************************************************
StopWDT   mov.w     #WDTPW+WDTHOLD,&WDTCTL	; Stop Watchdog Timer

SetupFLL2
	bis.b   #FN_4,&SCFI0                          	; x2 DCO, 8MHz nominal DCO  
	bis.b   #DCOPLUS+XCAP14PF,&FLL_CTL0           	; DCO+, configure load caps
	mov.b   #121,&SCFQCTL                         	;(121+1) x 2 x 32768 = 7.99 Mhz       

SetupPorts

; Port 2
          bis.b #CSb, &P2DIR  
          bis.b #CSb, &P2OUT  

; Port 4
          bis.b #SPI,&P4SEL	                          		; P4.3,4,5 SPI option select

SetupSPI0
          bis.b #USPIE0,&ME1                              		; Enable SPI TX/RX
          mov.b #CHAR+SYNC+MM,&U0CTL                      	; 8-bit SPI Master
          bis.b #SSEL0+SSEL1+STC,&U0TCTL
          mov.b #02h,&U0BR0
          mov.b #00h,&U0BR1
          mov.b #00h,&U0MCTL
          bis.b #UTXIE0, &P1IE

SetupSPI1
          bis.b #USPIE1,&ME2                              		; Enable SPI TX/RX
          mov.b #CHAR+SYNC+MM+SWRST,&U1CTL           	; 8-bit SPI Master
          bis.b #CKPL+SSEL0+SSEL1+STC,&U1TCTL          	; 3-pin SPI mode, SMCLK
          mov.b #002h,&U1BR0                              	; CKPL+CKPH gives SCLK idle high and data 
          mov.b #000h,&U1BR1                              	; sampled on the falling edge of SCLK
          mov.b #000h,&U1MCTL                            	; CKPL gives SCLK idle high and data
          bis.b #USPIE1,&ME2                              		; sampled on the rising edge of SCLK
          bic.b #SWRST, &U1CTL                           	; CKPH gives SCLK idle low and data
                                                          		; sampled on the rising edge of SCLK
          ret				 		
;*********************************************************************************
         COMMON  INTVEC              			; MSP430x44x Interrupt vectors             
;*********************************************************************************           
          ORG     RESET_VECTOR
RESET_VEC  DW      RESET               			; POR, ext. Reset, Watchdog
          ORG     PORT2_VECTOR

           END