r40008.inc

ARM入门的好帮手.包含了从简单到相对较复杂的程序.

;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;------------------------------------------------------------------------------
;- File Name            : r40008.inc
;- Object               : AT91R40008 Definition File.
;-
;- 1.0 06/08/01  PFi    : Creation
;- 1.0 08/11/01  PFi    : SRAM_LIMIT Definition has been modify
;------------------------------------------------------------------------------


;--------------------------------------
;- Peripheral Identifier and Interrupt
;--------------------------------------

FIQ_ID              EQU     0       ;- Fast Interrupt
SWIRQ_ID            EQU     1       ;- Soft Interrupt (generated by the AIC)
US0_ID              EQU     2       ;- USART Channel 0 interrupt
US1_ID              EQU     3       ;- USART Channel 1 interrupt
TC0_ID              EQU     4       ;- Timer Channel 0 interrupt
TC1_ID              EQU     5       ;- Timer Channel 1 interrupt
TC2_ID              EQU     6       ;- Timer Channel 2 interrupt
WDI_ID              EQU     7       ;- Watchdog interrupt
PIO_ID              EQU     8       ;- Parallel I/O Controller A interrupt

IRQ0_ID             EQU     16      ;- External interrupt 0
IRQ1_ID             EQU     17      ;- External interrupt 1
IRQ2_ID             EQU     18      ;- External interrupt 2

;------------------------
;- Peripheral Memory Map
;------------------------

WD_BASE             EQU     0xFFFF8000      ;- WD: Watchdog Timer Base Address
PIO_BASE            EQU     0xFFFF0000      ;- Parallel I/O Controller Base Address
USART1_BASE         EQU     0xFFFCC000      ;- USART 1 Base Address
USART0_BASE         EQU     0xFFFD0000      ;- USART 0 Base Address

;- Timer Counter Base Addresses
TCB0_BASE           EQU     0xFFFE0000
TC0_BASE            EQU     0xFFFE0000
TC1_BASE            EQU     0xFFFE0040
TC2_BASE            EQU     0xFFFE0080

;--------------------------
;- Internal RAM Definition
;--------------------------
; The Internal SRAM is redefined in two blocks (248K + 8K) due to the EB40A has no External SRAM. 
; The 8K (from 0x0 to 0x01FFF) are for Vector table and Exception stack defined by RAM_LIMIT.
; The 248K (from 0x2000 to 0x3FFFF) are for User Application code and Application stack defined by EXT_SRAM_LIMIT

RAM_BASE            EQU     (0x00000000)    ;- Address of the Internal SRAM after the remap command
RAM_SIZE            EQU     (256*1024)      

; **************
; * WARNING !!!*  The RAM_LIMIT definition does not correspond to ( RAM_BASE + RAM_SIZE )
; ************** 

; - This is for compatipility with the cstartup_xxx.ads (flash, ice or angel).
RAM_LIMIT           EQU     (RAM_BASE + (8*1024))       ; The size of the Application stack is 8K.


;- The internal RAM is mapped at address 0x00300000 after reset until
;- Remap command is performed on the EBI.

RAM_BASE_BOOT       EQU     0x00300000

;-----------
;- ARM Core
;-----------
        INCLUDE         ../../periph/arm7tdmi/arm.inc

;-----------------------------
;- Special Function Registers
;-----------------------------
        INCLUDE         ../../periph/special_function/sf.inc

;-------------------------
;- External Bus Interface
;-------------------------
        INCLUDE         ../../periph/ebi/ebi.inc

;---------------------------
;- Power Saving Controller
;---------------------------
        INCLUDE         ../../periph/power_saving/ps40800.inc

;--------------------------------
;- Advanced Interrupt Controller
;--------------------------------

        INCLUDE         ../../periph/aic/aic.inc

;--------------------------
;- Parallel I/O Controller
;--------------------------
        INCLUDE         ../../periph/pio/pio.inc
        INCLUDE     ../../periph/pio/pio_single.inc

NB_PIO          EQU     31          ;- Number of PIO Lines


;-------------------
;- Pin Multiplexing
;-------------------
;- PIO Controller

PIOTCLK0        EQU     0           ;- Timer 0 Clock signal
PIOTIOA0        EQU     1           ;- Timer 0 Signal A
PIOTIOB0        EQU     2           ;- Timer 0 Signal B

PIOTCLK1        EQU     3           ;- Timer 1 Clock signal
PIOTIOA1        EQU     4           ;- Timer 1 Signal A
PIOTIOB1        EQU     5           ;- Timer 1 Signal B

PIOTCLK2        EQU     6           ;- Timer 2 Clock signal input
PIOTIOA2        EQU     7           ;- Timer 2 Signal A
PIOTIOB2        EQU     8           ;- Timer 2 Signal B

PIOIRQ0         EQU     9           ;- External Interrupt 0
PIOIRQ1         EQU     10          ;- External Interrupt 1
PIOIRQ2         EQU     11          ;- External Interrupt 2
PIOFIQ          EQU     12          ;- Fast Interrupt input

PIOSCK0         EQU     13          ;- USART 0 clock signal
PIOTXD0         EQU     14          ;- USART 0 transmit data signal
PIORXD0         EQU     15          ;- USART 0 receive data signal

PIOSCK1         EQU     20          ;- USART 1 clock signal
PIOTXD1         EQU     21          ;- USART 1 transmit data signal
PIORXD1         EQU     22          ;- USART 1 receive data signal

PIOMCK0         EQU     25          ;- Master Clock Output
PIONCS2         EQU     26          ;- Chip Select 2
PIONCS3         EQU     27          ;- Chip Select 3
PIOCS7          EQU     28          ;- Address 20/Chip Select 7
PIOCS6          EQU     29          ;- Address 21/Chip Select 6
PIOCS5          EQU     30          ;- Address 22/Chip Select 5
PIOCS4          EQU     31          ;- Address 23/Chip Select 4

;---------
;- USARTs
;---------
;- Definition file
        INCLUDE         ../../periph/usart/usart.inc

;-----------
;- Watchdog
;-----------
;- Definition file
        INCLUDE         ../../periph/watchdog/wd.inc

;----------------
;- Timer Counter
;----------------
        INCLUDE         ../../periph/timer_counter/tc.inc

                END