m63200.inc

ARM入门的好帮手.包含了从简单到相对较复杂的程序.

;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;------------------------------------------------------------------------------
;- File Name            : m63200.inc
;- Object               : AT91M63200 Definition File.
;-
;- 1.0 01/04/00 JCZ     : Creation
;- 1.1 02/11/00 JPP     : Green Hills
;------------------------------------------------------------------------------

;------------------------
;- Peripheral Memory Map
;------------------------
; AIC, PMC, SF and EBI base addresses are described in periph header files.

WD_BASE         EQU     0xFFFF8000      ;- WD: Watchdog Timer
PIOB_BASE       EQU     0xFFFF0000      ;- Parallel I/O Controller B
PIOA_BASE       EQU     0xFFFEC000      ;- Parallel I/O Controller A
TCB1_BASE       EQU     0xFFFD4000      ;- Channels 3, 4, 5
TCB0_BASE       EQU     0xFFFD0000      ;- Channels 0, 1, 2
USART2_BASE     EQU     0xFFFC8000      ;- USART 2
USART1_BASE     EQU     0xFFFC4000      ;- USART 1
USART0_BASE     EQU     0xFFFC0000      ;- USART 0
SPI_BASE        EQU     0xFFFBC000      ;- SPI

;----------------------------------
; Internal Memory Mapping and Size
;----------------------------------

RAM_BASE        EQU     0
RAM_SIZE        EQU     (2*1024)
RAM_LIMIT       EQU     (RAM_BASE+RAM_SIZE)
RAM_BASE_BOOT   EQU     0x00300000

;---------------------
; ARM Core : ARM7TDMI
;---------------------
        INCLUDE         ../../periph/arm7tdmi/arm.inc

;-----------------------------
;- Special Function Registers
;-----------------------------
        INCLUDE         ../../periph/special_function/sf.inc

;------------------------
; External Bus Interface
;------------------------
        INCLUDE         ../../periph/ebi/ebi.inc

;-----------------------------
; Power Management Controller
;-----------------------------
        INCLUDE         ../../periph/power_saving/pmc63200.inc

;-------------------------------------------------
; AIC Interrupt Sources and peripheral Identifier
;-------------------------------------------------
        INCLUDE         ../../periph/aic/aic.inc

AIC_FIQ_ID      EQU     0       ;- Fast Interrupt
AIC_SWIRQ_ID    EQU     1       ;- Soft Interrupt (generated by the AIC)
AIC_US0IRQ_ID   EQU     2       ;- USART Channel 0 interrupt
AIC_US1IRQ_ID   EQU     3       ;- USART Channel 1 interrupt
AIC_US2IRQ_ID   EQU     4       ;- USART Channel 2 interrupt
AIC_SPIRQ_ID    EQU     5       ;- SPI interrupt
AIC_TC0IRQ_ID   EQU     6       ;- Timer Channel 0 interrupt
AIC_TC1IRQ_ID   EQU     7       ;- Timer Channel 1 interrupt
AIC_TC2IRQ_ID   EQU     8       ;- Timer Channel 2 interrupt
AIC_TC3IRQ_ID   EQU     9       ;- Timer Channel 3 interrupt
AIC_TC4IRQ_ID   EQU     10      ;- Timer Channel 4 interrupt
AIC_TC5IRQ_ID   EQU     11      ;- Timer Channel 5 interrupt
AIC_WDIRQ_ID    EQU     12      ;- Watchdog interrupt
AIC_PIOAIRQ_ID  EQU     13      ;- Parallel I/O Controller A interrupt
AIC_PIOBIRQ_ID  EQU     14      ;- Parallel I/O Controller B interrupt

AIC_IRQ3_ID     EQU     28      ;- External interrupt 3
AIC_IRQ2_ID     EQU     29      ;- External interrupt 2
AIC_IRQ1_ID     EQU     30      ;- External interrupt 1
AIC_IRQ0_ID     EQU     31      ;- External interrupt 0


;-----------------
; PIO Controllers
;-----------------
        INCLUDE     ../../periph/pio/pioa.inc
        INCLUDE     ../../periph/pio/piob.inc

NB_PIOA         EQU 30      ;- Number of PIO A Lines
NB_PIOB         EQU 28      ;- Number of PIO A Lines

; Port A

TCLK3           EQU     PA0
TIOA3           EQU     PA1
TIOB3           EQU     PA2
PIN_TC3         EQU     (TIOA3:OR:TIOB3:OR:TCLK3)

TCLK4           EQU     PA3
TIOA4           EQU     PA4
TIOB4           EQU     PA5
PIN_TC4         EQU     (TIOA4:OR:TIOB4:OR:TCLK4)

TCLK5           EQU     PA6
TIOA5           EQU     PA7
TIOB5           EQU     PA8
PIN_TC5         EQU     (TIOA5:OR:TIOB5:OR:TCLK5)

PIN_IRQ0        EQU     PA9
PIN_IRQ1        EQU     PA10
PIN_IRQ2        EQU     PA11
PIN_IRQ3        EQU     PA12
PIN_FIQ         EQU     PA13

SCK0            EQU     PA14
TXD0            EQU     PA15
RXD0            EQU     PA16
PIN_USART0      EQU     (SCK0:OR:TXD0:OR:RXD0)

SCK1            EQU     PA17
TXD1            EQU     PA18
RXD1            EQU     PA19
PIN_USART1      EQU     (SCK1:OR:TXD1:OR:RXD1)

SCK2            EQU     PA20
TXD2            EQU     PA21
RXD2            EQU     PA22
PIN_USART2      EQU     (SCK2:OR:TXD2:OR:RXD2)

SPCK            EQU     PA23
MISO            EQU     PA24
MOSI            EQU     PA25
NPCS0           EQU     PA26
NPCS1           EQU     PA27
NPCS2           EQU     PA28
NPCS3           EQU     PA29

; Port B

TCLK0           EQU     PB19
TIOA0           EQU     PB20
TIOB0           EQU     PB21
PIN_TC0         EQU     (TIOA0:OR:TIOB0:OR:TCLK0)

TCLK1           EQU     PB22
TIOA1           EQU     PB23
TIOB1           EQU     PB24
PIN_TC1         EQU     (TIOA1:OR:TIOB1:OR:TCLK1)

TCLK2           EQU     PB25
TIOA2           EQU     PB26
TIOB2           EQU     PB27
PIN_TC2         EQU     (TIOA2:OR:TIOB2:OR:TCLK2)

MCKO            EQU     PB17

BMS             EQU     PB18

MPI_NOE         EQU     PB0
MPI_NLB         EQU     PB1
MPI_NUB         EQU     PB2

                END