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📄 cstartup.paf.arm

📁 ARM入门的好帮手.包含了从简单到相对较复杂的程序.
💻 ARM
📖 第 1 页 / 共 4 页
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.weak __ghsend_sbss
#line 41

#line 41
                ldr         r1, =__ghsend_sbss    
#line 41
                ldr         r3, =__ghsbegin_sbss  
#line 41
		mov         r2, 0
#line 41
LoopZI2          
#line 41
		cmp         r3, r1                 
#line 41
                strcc       r2, [r3], 4
#line 41
                bcc         LoopZI2      
#line 41

#line 41

#line 41
        #if  defined(SEMIHOSTING)
#line 41

#line 41

#line 41

#line 41

#line 41

#line 41

#line 41

#line 41
                
#line 41
#define SEMIHOSTING_STACK_SIZE   (8*1024) 
#line 41

#line 41

#line 41
                ldr         r0, = SEMIHOSTING_STACK_SIZE
#line 41
                sub         r13, r13,r0
#line 41
                
#line 41
.weak __ghsbegin_robase
#line 41

#line 41
		mov	fp, 0				
#line 41
		ldr	r0, pool_baseptrs		
#line 41
 				
#line 41
		bl	__ghs_ind_crt0			
#line 41
				
#line 41
 pool_baseptrs:
#line 41
 		.data.w	baseptrs
#line 41
 baseptrs:
#line 41
 		.data.w	__ghsbegin_picbase
#line 41
 		.data.w	__ghsbegin_robase
#line 41
		.data.w	__ghsbegin_pidbase
#line 41
 
#line 41
        #else                                
#line 41
        
#line 41

#line 41

#line 41

#line 41

#line 41

#line 41

#line 41

#line 41
                IMPORT      main
#line 41

#line 41
                ldr         r0, =main
#line 41
                mov         lr, pc
#line 41
                bx          r0
#line 41
        #endif                               
#line 41
                
#line 41

#line 41

#line 41

#line 41

#line 41

#line 41

#line 41
End
#line 41
                b           End
#line 41
                
#line 41

#line 41
.type __main, $function
#line 41
.size __main,.-__main
#line 41

#line 41

#line 41
            /*END*/
#line 41

#line 41
#line 42
#line 42

#line 43

#line 44

#line 45

#line 46

#line 47
__low_level_init
#line 48
                mvn         r0,0               
#line 49
                ldr         r1,=APMC_BASE        
#line 50
                str         r0,[r1,0x14]   
#line 51
                mov         pc,r14              
#line 52

#line 53
                #endif                           
#line 54

#line 55

#line 56

#line 57

#line 58

#line 59
                #if  defined(AT91_DEBUG_NONE)
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
;.section ".reset","ax" 
;.reset
#line 61
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                EXPORT      __main
#line 60
__main
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                __ENTRY::
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                B           InitReset       
#line 60
undefvec
#line 60
                B           undefvec        
#line 60
swivec
#line 60
                B           swivec          
#line 60
pabtvec
#line 60
                B           pabtvec         
#line 60
dabtvec 
#line 60
                B           dabtvec         
#line 60
rsvdvec
#line 60
                B           rsvdvec         
#line 60
irqvec
#line 60
                B           irqvec          
#line 60
fiqvec
#line 60
                B           fiqvec          
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
VectorTable
#line 60
                ldr         pc, [pc, 0x18]          
#line 60
                ldr         pc, [pc, 0x18]          
#line 60
                ldr         pc, [pc, 0x18]          
#line 60
                ldr         pc, [pc, 0x18]          
#line 60
                ldr         pc, [pc, 0x18]          
#line 60
                nop                                 
#line 60
                ldr         pc, [pc,-0xF20]        
#line 60
                ldr         pc, [pc,-0xF20]        
#line 60

#line 60

#line 60
                
	.word         SoftReset
#line 60
                
	.word         UndefHandler
#line 60
                
	.word         SWIHandler
#line 60
                
	.word         PrefetchAbortHandler
#line 60
                
	.word         DataAbortHandler
#line 60

#line 60
SoftReset
#line 60
                b           SoftReset
#line 60
UndefHandler    
#line 60
                b           UndefHandler
#line 60
SWIHandler
#line 60
                b           SWIHandler
#line 60
PrefetchAbortHandler
#line 60
                b           PrefetchAbortHandler
#line 60
DataAbortHandler
#line 60
                b           DataAbortHandler
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
InitTableEBI
#line 60
            
	.word         EBI_CSR_0  
#line 60
            
	.word         EBI_CSR_1  
#line 60
            
	.word         EBI_CSR_2  
#line 60
            
	.word         EBI_CSR_3  
#line 60
            
	.word         EBI_CSR_4  
#line 60
            
	.word         EBI_CSR_5  
#line 60
            
	.word         EBI_CSR_6  
#line 60
            
	.word         EBI_CSR_7  
#line 60
            
	.word         0x00000001  
#line 60
            
	.word         0x00000006  
#line 60
PtEBIBase
#line 60
            
	.word         EBI_BASE    
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
InitReset
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                ldr     r0, PtEBIBase
#line 60
                ldr     r1, [pc,-(8+.-InitTableEBI)] 
#line 60
    
#line 60

#line 60
                str     r1, [r0]
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                bl      __low_level_init
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                add     r0, pc,AicData-8-.  
#line 60

#line 60
                ldmia   r0, {r1-r4}
#line 60

#line 60

#line 60
                str     r4, [r1, 0x134]      
#line 60

#line 60

#line 60
                str     r2, [r1, 0x80]      
#line 60
                add     r1, r1, 0x80
#line 60
                mov     r0, 31                 
#line 60
LoopAic1
#line 60
                str     r3, [r1, r0, LSL 2]    
#line 60
                subs    r0, r0, 1              
#line 60
                bhi     LoopAic1
#line 60

#line 60
                b       EndInitAic
#line 60

#line 60

#line 60
AicData
#line 60
                
	.word     AIC_BASE                
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                IMPORT  at91_default_fiq_handler
#line 60
                IMPORT  at91_default_irq_handler
#line 60
                IMPORT  at91_spurious_handler
#line 60
PtDefaultHandler
#line 60
                
	.word     at91_default_fiq_handler
#line 60
                
	.word     at91_default_irq_handler
#line 60
                
	.word     at91_spurious_handler
#line 60
EndInitAic
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                mov     r8, RAM_BASE_BOOT          
#line 60
                sub     r9, pc,8+.-VectorTable  
#line 60
                ldmia   r9!, {r0-r7}            
#line 60
                stmia   r8!, {r0-r7}            
#line 60
                ldmia   r9!, {r0-r4}            
#line 60
                stmia   r8!, {r0-r4}            
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                sub     r10, pc,8+.-InitTableEBI 
#line 60
                ldr     r12, PtInitRemap        
#line 60

#line 60

#line 60
                ldmia   r10!, {r0-r9,r11}       
#line 60
                stmia   r11!, {r0-r9}           
#line 60

#line 60

#line 60
                mov     pc, r12                 
#line 60

#line 60
PtInitRemap
#line 60
                
	.word     InitRemap               
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
InitRemap
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
#define IRQ_STACK_SIZE           (3*8*4)     
#line 60
#define FIQ_STACK_SIZE           (3*4)       
#line 60
#define ABT_STACK_SIZE           (1*4)       
#line 60
#define UND_STACK_SIZE           (1*4)       
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
#define TOP_EXCEPTION_STACK          RAM_LIMIT           
#line 60
#define TOP_APPLICATION_STACK        EXT_SRAM_LIMIT      
#line 60

#line 60

#line 60

#line 60

#line 60
                ldr     r0, =TOP_EXCEPTION_STACK
#line 60

#line 60

#line 60
                msr     CPSR_c, ARM_MODE_FIQ | I_BIT | F_BIT
#line 60
                mov     r13, r0                     
#line 60
                sub     r0, r0, FIQ_STACK_SIZE
#line 60

#line 60

#line 60
                msr     CPSR_c, ARM_MODE_IRQ | I_BIT | F_BIT
#line 60
                mov     r13, r0                     
#line 60
                sub     r0, r0, IRQ_STACK_SIZE
#line 60

#line 60

#line 60
                msr     CPSR_c, ARM_MODE_ABORT | I_BIT | F_BIT
#line 60
                mov     r13, r0                     
#line 60
                sub     r0, r0, ABT_STACK_SIZE
#line 60

#line 60

#line 60
                msr     CPSR_c, ARM_MODE_UNDEF | I_BIT | F_BIT
#line 60
                mov     r13, r0                     
#line 60
                sub     r0, r0, UND_STACK_SIZE
#line 60

#line 60

#line 60
                msr     CPSR_c, ARM_MODE_SVC | I_BIT | F_BIT
#line 60
                mov     r13, r0                     
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                msr     CPSR_c, ARM_MODE_USER      
#line 60
                ldr     r13, =TOP_APPLICATION_STACK 
#line 60
                
#line 60

#line 60

#line 60

#line 60
 
#line 60
 
#line 60
 
#line 60
 .weak __ghsbegin_bss
#line 60
 .weak __ghsend_bss
#line 60
 
#line 60
                ldr         r1, =__ghsend_bss     
#line 60
                ldr         r3, =__ghsbegin_bss   
#line 60
 		mov         r2, 0
#line 60
LoopZI          
#line 60
 		cmp         r3, r1                 
#line 60
                strcc       r2, [r3], 4
#line 60
                bcc         LoopZI      
#line 60
 
#line 60
 
#line 60
 
#line 60
 .weak __ghsbegin_sbss
#line 60
 .weak __ghsend_sbss
#line 60
 
#line 60
                ldr         r1, =__ghsend_sbss    
#line 60
                ldr         r3, =__ghsbegin_sbss  
#line 60
 		mov         r2, 0
#line 60
LoopZI2          
#line 60
 		cmp         r3, r1                 
#line 60
                strcc       r2, [r3], 4
#line 60
                bcc         LoopZI2      
#line 60
 
#line 60
 
#line 60
 
#line 60
 .weak __ghsbegin_data
#line 60
 .weak __ghsend_data
#line 60
 .weak __ghsbegin_romdata
#line 60
 
#line 60
                ldr         r0, =__ghsbegin_romdata 
#line 60
                ldr         r1, =__ghsbegin_data    
#line 60
                ldr         r3, =__ghsend_data      
#line 60
LoopRW
#line 60
 		cmp         r1, r3                  
#line 60
                ldrcc       r2, [r0], 4
#line 60
 		strcc       r2, [r1], 4
#line 60
                bcc         LoopRW      
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
                IMPORT      main
#line 60

#line 60
                ldr         r0, =main
#line 60
                mov         lr, pc
#line 60
                bx          r0
#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60

#line 60
End
#line 60
                b           End
#line 60
                
#line 60
.type __main, $function
#line 60
.size __main,.-__main
#line 60
                
#line 60
            /*END*/
#line 60

#line 60
#line 61
#line 61

#line 62

#line 63

#line 64

#line 65

#line 66
__low_level_init
#line 67

#line 68

#line 69

#line 70
                ldr     r0, =0x002F0002             
#line 71
                ldr     r1, =APMC_BASE              
#line 72
                str     r0, [r1, 0x20]        
#line 73

#line 74

#line 75

#line 76
                mov     r4, APMC_MOSCS
#line 77
MoscsLoop
#line 78
                ldr     r2, [r1, 0x30]
#line 79
                and     r2, r4,r2
#line 80
                cmp     r2, APMC_MOSCS
#line 81
                bne     MoscsLoop
#line 82

#line 83

#line 84

#line 85
                ldr     r0, =0x002F4002             
#line 86
                str     r0, [r1, 0x20]        
#line 87

#line 88

#line 89

#line 90
                ldr     r0, =0x032F4102             
#line 91
                str     r0, [r1, 0x20]        
#line 92

#line 93

#line 94

#line 95
                mov     r4, APMC_PLL_LOCK
#line 96
Pll_Loop
#line 97
                ldr     r3, [r1, 0x30]
#line 98
                and     r3, r4,r3
#line 99
                cmp     r3, APMC_PLL_LOCK
#line 100
                bne     Pll_Loop
#line 101

#line 102

#line 103

#line 104
                ldr     r0, =0x032F8102             
#line 105
                str     r0, [r1, 0x20]        
#line 106

#line 107

#line 108

#line 109
                mov         pc,r14              
#line 110
                #endif                           
#line 111

#line 112
        /*END*/
#line 113

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