📄 cstartup.s
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;------------------------------------------------------------------------------
;- ATMEL Microcontroller Software Support - ROUSSET -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source : cstartup.s
;- Object : C startup choice for EB42
;-
;- 1.0 17/07/00 PF : Creation
;- 1.1 10/06/01 PF : New cstartup
;------------------------------------------------------------------------------
INCLUDE ../../targets/eb42/eb42.inc
;------------------------------------------------------------------------------
; Angel Rom Monitor Method
;- Preprocessor Flag can be set : SEMIHOSTING
;------------------------------------------------------------------------------
IF :DEF:AT91_DEBUG_ANGEL
INCLUDE ..\cstartup_angel.s
;----------------------------------------------------------------------
; Call __low_level_init to perform initialization before initializing
; AIC and calling main.
; Diasable all peripherial clock
;----------------------------------------------------------------------
__low_level_init
mov pc,r14 ; Return
ENDIF ; AT91_DEBUG_ANGEL }
;------------------------------------------------------------------------------
; ICE or Sram Method
;- Preprocessor Flag can be set : SEMIHOSTING
;------------------------------------------------------------------------------
IF :DEF:AT91_DEBUG_ICE ; {
INCLUDE ..\cstartup_ice.s
;----------------------------------------------------------------------
; Call __low_level_init to perform initialization before initializing
; AIC and calling main.
; Diasable all peripherial clock
;----------------------------------------------------------------------
__low_level_init
mvn r0,#0 ; R0<- 0xFFFFFFFF
ldr r1,=PMC_BASE ; Get Power saving configuartion
str r0,[r1,#PMC_PCDR] ; Diasable all peripherial clock
mov pc,r14 ; Return
ENDIF ; AT91_DEBUG_ICE }
;------------------------------------------------------------------------------
; Flash Method
;------------------------------------------------------------------------------
IF :DEF:AT91_DEBUG_NONE ; {
INCLUDE ..\cstartup_flash.s
;----------------------------------------------------------------------
; Call __low_level_init to perform initialization before initializing
; AIC and calling main.
; Pll Initialization
;----------------------------------------------------------------------
__low_level_init
;---------------------------------------------------------------------------
; - Power Management Controller Configuration - -
;---------------------------------------------------------------------------
; At reset, the AT91M42800 runs from the Slow Clock Oscillator @ 32,768Khz.
; The PLLA is uses to run @ 32,768Mhz --> 32,768Khz*(999 + 1)
;
;- Disable External Watchdog assertion -
;--------------------------------------------
ldr r0, =0x0
ldr r1, =ST_BASE
str r0, [r1, #ST_WDMR] ; Disable the WatchDog Timer
;- Set up the Clock frequency to run at 32,768 Mhz with PLLA
;-------------------------------------------------------------
ldr r0, =0xC503E700 ; PLLCOUNT = 197 (6ms, 0xC5), MUL=999, PLLA
ldr r1, =PMC_BASE ; Get the PMC Base Address
str r0, [r1, #PMC_CGMR] ; Store the configuration of the Clock Generator
;- Reading the PMC Status Register to detect when the PLLA is stabilized
;-----------------------------------------------------------------------
mov r4, #PMC_PLL_LOCK ; PLL Lock bit in PMC_SR
PllLoop
ldr r2, [r1, #PMC_SR]
cmp r2, r4
bne PllLoop
;- Commuting from Slow Clock (32,768Khz) to PLLA (32,768Mhz)
;-----------------------------------------------------------
ldr r0, =0xC503E790 ; PLLCOUNT = 197 (6ms, 0xC5), MUL=999, CSS= PLL, PLLA
str r0, [r1, #PMC_CGMR] ; Store the configuration of the Clock Generator
;---------------------------------------------------------
;- Now the Master clock is the output of PLLA @ 32,768MHz -
;---------------------------------------------------------
mov pc,r14 ; Return
ENDIF ; AT91_DEBUG_NONE }
END
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