cstartup.paf.arm

ARM入门的好帮手.包含了从简单到相对较复杂的程序.

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#define PB8                  (1 << 8)
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#define PB9                  (1 << 9)
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#define PB10                 (1 << 10)
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#define PB11                 (1 << 11)
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#define PB12                 (1 << 12)
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#define PB13                 (1 << 13)
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#define PB14                 (1 << 14)
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#define PB15                 (1 << 15)
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#define PB16                 (1 << 16)
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#define PB17                 (1 << 17)
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#define PB18                 (1 << 18)
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#define PB19                 (1 << 19)
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#define PB20                 (1 << 20)
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#define PB21                 (1 << 21)
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#define PB22                 (1 << 22)
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#define PB23                 (1 << 23)
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#define PB24                 (1 << 24)
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#define PB25                 (1 << 25)
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#define PB26                 (1 << 26)
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#define PB27                 (1 << 27)
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                /*END*/
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#define NB_PIOA          30      
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#define NB_PIOB          28      
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#define TCLK3                PA0
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#define TIOA3                PA1
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#define TIOB3                PA2
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#define PIN_TC3              (TIOA3 | TIOB3 | TCLK3)
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#define TCLK4                PA3
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#define TIOA4                PA4
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#define TIOB4                PA5
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#define PIN_TC4              (TIOA4 | TIOB4 | TCLK4)
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#define TCLK5                PA6
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#define TIOA5                PA7
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#define TIOB5                PA8
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#define PIN_TC5              (TIOA5 | TIOB5 | TCLK5)
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#define PIN_IRQ0             PA9
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#define PIN_IRQ1             PA10
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#define PIN_IRQ2             PA11
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#define PIN_IRQ3             PA12
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#define PIN_FIQ              PA13
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#define SCK0                 PA14
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#define TXD0                 PA15
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#define RXD0                 PA16
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#define PIN_USART0           (SCK0 | TXD0 | RXD0)
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#define SCK1                 PA17
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#define TXD1                 PA18
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#define RXD1                 PA19
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#define PIN_USART1           (SCK1 | TXD1 | RXD1)
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#define SCK2                 PA20
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#define TXD2                 PA21
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#define RXD2                 PA22
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#define PIN_USART2           (SCK2 | TXD2 | RXD2)
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#define SPCK                 PA23
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#define MISO                 PA24
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#define MOSI                 PA25
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#define NPCS0                PA26
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#define NPCS1                PA27
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#define NPCS2                PA28
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#define NPCS3                PA29
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#define TCLK0                PB19
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#define TIOA0                PB20
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#define TIOB0                PB21
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#define PIN_TC0              (TIOA0 | TIOB0 | TCLK0)
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#define TCLK1                PB22
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#define TIOA1                PB23
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#define TIOB1                PB24
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#define PIN_TC1              (TIOA1 | TIOB1 | TCLK1)
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#define TCLK2                PB25
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#define TIOA2                PB26
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#define TIOB2                PB27
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#define PIN_TC2              (TIOA2 | TIOB2 | TCLK2)
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#define MCKO                 PB17
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#define BMS                  PB18
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#define MPI_NOE              PB0
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#define MPI_NLB              PB1
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#define MPI_NUB              PB2
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                /*END*/
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#define FLASH_BASE           0x01000000
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#define EXT_SRAM_BASE        0x02000000
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#define EXT_SRAM_SIZE        0x00040000              
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#define EXT_SRAM_LIMIT       (EXT_SRAM_BASE+EXT_SRAM_SIZE)
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#define EBI_CSR_0            (FLASH_BASE  |  0x2529)    
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#define EBI_CSR_1            (EXT_SRAM_BASE  |  0x2121) 
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#define EBI_CSR_2            0x20000000  
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#define EBI_CSR_3            0x30000000  
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#define EBI_CSR_4            0x40000000  
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#define EBI_CSR_5            0x50000000  
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#define EBI_CSR_6            0x60000000  
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#define EBI_CSR_7            0x70000000  
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#define LED1             PB8         
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#define LED2             PB9         
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#define LED3             PB10        
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#define LED4             PB11        
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#define LED5             PB12        
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#define LED6             PB13        
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#define LED7             PB14        
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#define LED8             PB15        
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#define LED_PIO_CTRL         1
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#define LED_MASK             0x0000FF00
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#define BP_S1           PB3
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#define BP_S2           PB4
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#define BP_S3           PB5
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#define BP_S4           PA9
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#define PB_PIO_CTRL      1
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#define SHDW                 PA22
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#define SHDW_PIO_CTRL        1
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#define SCL                  PA20
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#define SDA                  PA21
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            /*END*/
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                #if  defined(AT91_DEBUG_ANGEL)
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;.section ".reset","ax" 
;.reset
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                EXPORT      __main
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__main
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                B           InitReset       
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InitTableEBI
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	.word         EBI_CSR_0  
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	.word         EBI_CSR_1  
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	.word         EBI_CSR_2  
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	.word         EBI_CSR_3  
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	.word         EBI_CSR_4  
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	.word         EBI_CSR_5  
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	.word         EBI_CSR_6  
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	.word         EBI_CSR_7  
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	.word         0x00000001  
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	.word         0x00000006  
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PtEBIBase
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	.word         EBI_BASE    
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InitReset
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                bl      __low_level_init
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                sub     r10, pc,8+.-InitTableEBI 
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                ldmia   r10!, {r0-r9,r11}       
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                stmia   r11!, {r0-r9}           
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#define IRQ_STACK_SIZE           (3*8*4)     
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#define FIQ_STACK_SIZE           (3*4)       
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#define ABT_STACK_SIZE           (1*4)       
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#define UND_STACK_SIZE           (1*4)       
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#define TOP_EXCEPTION_STACK          RAM_LIMIT           
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#define TOP_APPLICATION_STACK        EXT_SRAM_LIMIT      
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                ldr     r0, =TOP_EXCEPTION_STACK
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                msr     CPSR_c, ARM_MODE_FIQ | I_BIT | F_BIT
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                mov     r13, r0                     
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                sub     r0, r0, FIQ_STACK_SIZE
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                msr     CPSR_c, ARM_MODE_IRQ | I_BIT | F_BIT
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                mov     r13, r0                     
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                sub     r0, r0, IRQ_STACK_SIZE
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                msr     CPSR_c, ARM_MODE_ABORT | I_BIT | F_BIT
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                mov     r13, r0                     
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                sub     r0, r0, ABT_STACK_SIZE
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                msr     CPSR_c, ARM_MODE_UNDEF | I_BIT | F_BIT
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                mov     r13, r0                     
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                sub     r0, r0, UND_STACK_SIZE
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                msr     CPSR_c, ARM_MODE_SVC | I_BIT | F_BIT
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                mov     r13, r0                     
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                msr     CPSR_c, ARM_MODE_USER      
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                ldr     r13, =TOP_APPLICATION_STACK 
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.weak __ghsbegin_bss
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.weak __ghsend_bss
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                ldr         r1, =__ghsend_bss     
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                ldr         r3, =__ghsbegin_bss   
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		mov         r2, 0
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LoopZI          
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		cmp         r3, r1                 
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                strcc       r2, [r3], 4
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                bcc         LoopZI      
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.weak __ghsbegin_sbss
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.weak __ghsend_sbss
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                ldr         r1, =__ghsend_sbss    
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                ldr         r3, =__ghsbegin_sbss  
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		mov         r2, 0
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LoopZI2          
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		cmp         r3, r1                 
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                strcc       r2, [r3], 4
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                bcc         LoopZI2      
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        #if  defined(SEMIHOSTING)
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#define SEMIHOSTING_STACK_SIZE   (8*1024)                
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                ldr         r0, = SEMIHOSTING_STACK_SIZE
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                sub         r13, r13,r0
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 .weak __ghsbegin_robase
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 		mov	fp, 0				
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 		ldr	r0, pool_baseptrs		
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 		bl	__ghs_ind_crt0			
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 pool_baseptrs:
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 				.data.w	baseptrs
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 baseptrs:
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 				.data.w	__ghsbegin_picbase
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 				.data.w	__ghsbegin_robase
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 				.data.w	__ghsbegin_pidbase
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         #else                                
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                IMPORT      main
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                ldr         r0, =main
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                mov         lr, pc
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                bx          r0
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        #endif                               
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End
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                b           End
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.type __main, $function
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.size __main,.-__main
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            /*END*/
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__low_level_init
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                mov         pc,r14              
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                #endif                           
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                #if  defined(AT91_DEBUG_ICE)
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