📄 lib_at91.lst
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144 }
145
146 //* If PIOs required to be filtered
147 if ((config & PIO_FILTER_BIT) != 0 )
\ 00000014 FF3002E2 AND R3,R2,#+0xFF ;; Zero extend
\ 00000018 020013E3 TST R3,#+0x2
\ 0000001C 003090E5 LDR R3,[R0, #+0]
148 {
149 //* Enable the filter on PIOs
150 pio_pt->pio_base->PIO_IFER = mask ;
\ 00000020 20108315 STRNE R1,[R3, #+32]
151 }
152 else
153 {
154 //* Disable the filter on PIOs
155 pio_pt->pio_base->PIO_IFDR = mask ;
\ 00000024 24108305 STREQ R1,[R3, #+36]
156 }
157
158 //* If PIOs required to be open-drain
159 if ((config & PIO_OPENDRAIN_BIT) != 0 )
\ 00000028 FF3002E2 AND R3,R2,#+0xFF ;; Zero extend
\ 0000002C 040013E3 TST R3,#+0x4
\ 00000030 003090E5 LDR R3,[R0, #+0]
160 {
161 //* Enable the filter on PIOs
162 pio_pt->pio_base->PIO_MDER = mask ;
\ 00000034 50108315 STRNE R1,[R3, #+80]
163 }
164 else
165 {
166 //* Disable the filter on PIOs
167 pio_pt->pio_base->PIO_MDSR = mask ;
\ 00000038 58108305 STREQ R1,[R3, #+88]
168 }
169
170 //* If PIOs required for an input change interrupt
171 if ((config & PIO_INPUT_IRQ_BIT) != 0 )
\ 0000003C FF2002E2 AND R2,R2,#+0xFF ;; Zero extend
\ 00000040 080012E3 TST R2,#+0x8
\ 00000044 002090E5 LDR R2,[R0, #+0]
172 {
173 //* Remove any interrupt */
174 x = pio_pt->pio_base->PIO_ISR ;
\ 00000048 4C309215 LDRNE R3,[R2, #+76]
175 //* Enable the Input Change Interrupt on PIOs
176 pio_pt->pio_base->PIO_IER = mask ;
\ 0000004C 40108215 STRNE R1,[R2, #+64]
177 }
178 else
179 {
180 //* Disable the Input Change Interrupt on PIOs
181 pio_pt->pio_base->PIO_IDR = mask ;
\ 00000050 44108205 STREQ R1,[R2, #+68]
182 }
183
184 //* Defines the pins to be controlled by PIO Controller
185 pio_pt->pio_base->PIO_PER = mask ;
\ 00000054 ........ B ??Subroutine0_0
186
187 //* End
188 }
189 //*----------------------------------------------------------------------------
190 //* Function Name : at91_pio_close
191 //* Object : Cancel PIO Controller handling from pins managed by
192 //* a peripheral
193 //* Input Parameters : <pio_pt> = PIO Descriptor pointer
194 //* : <mask> = defines the pins to managed by peripheral
195 //* Output Parameters : none
196 //* Functions called : none
197 //*----------------------------------------------------------------------------
\ In segment NEARFUNC_A, align 4, keep-with-next
\ 00000000 CODE32
198 void at91_pio_close ( const PioCtrlDesc *pio_pt, u_int mask )
199 //* Begin
200 {
201 //* Define PIOs to be controlled by peripherals
202 pio_pt->pio_base->PIO_PDR = mask ;
\ at91_pio_close:
\ 00000000 002090E5 LDR R2,[R0, #+0]
\ 00000004 041082E5 STR R1,[R2, #+4]
203
204 //* End
205 }
\ 00000008 0EF0A0E1 MOV PC,LR ;; return
206
207 //*----------------------------------------------------------------------------
208 //* Function Name : at91_pio_write
209 //* Object : Write a data on required PIOs
210 //* Input Parameters : <pio_pt> = PIO Controller Descriptor Address
211 //* : <mask> = defines work pins
212 //* : <state> = defines set ( =0) or clear ( #0)
213 //* Output Parameters : none
214 //* Functions called : none
215 //*----------------------------------------------------------------------------
\ In segment NEARFUNC_A, align 4, keep-with-next
\ 00000000 CODE32
216 void at91_pio_write ( const PioCtrlDesc *pio_pt, u_int mask, u_int state )
217 //* Begin
218 {
219 if (state == PIO_CLEAR_OUT )
\ at91_pio_write:
\ 00000000 010052E3 CMP R2,#+0x1
\ 00000004 002090E5 LDR R2,[R0, #+0]
220 {
221 //* Clear PIOs with data at 0 in CODR (Clear Output Data Register)
222 pio_pt->pio_base->PIO_CODR = mask ;
\ 00000008 34108205 STREQ R1,[R2, #+52]
223 }
224 else
225 {
226 //* Set PIOs with data at 1 in SODR (Set Output Data Register)
227 pio_pt->pio_base->PIO_SODR = mask ;
228 }
229
230 //* End
231 }
\ 0000000C 0EF0A001 MOVEQ PC,LR ;; return
\ 00000010 301082E5 STR R1,[R2, #+48]
\ 00000014 0EF0A0E1 MOV PC,LR ;; return
232 //*----------------------------------------------------------------------------
233 //* Function Name : at91_pio_read
234 //* Object : Read the state of the PIO pins
235 //* Input Parameters : <pio_pt> = PIO Controller Descriptor Address
236 //* Output Parameters : defines the pins value
237 //* Functions called : at91_clock_get_status, at91_clock_open,
238 //* at91_clock_close
239 //*----------------------------------------------------------------------------
\ In segment NEARFUNC_A, align 4, keep-with-next
\ 00000000 CODE32
240 u_int at91_pio_read ( const PioCtrlDesc *pio_pt)
241
242 //* Begin
243 {
\ at91_pio_read:
\ 00000000 F0402DE9 STMDB SP!,{R4-R7,LR} ;; Push
\ 00000004 0040A0E1 MOV R4,R0
244
245 u_int return_val ;
246 u_int save_clock ;
247
248 //* Get clock Status
249 save_clock = at91_clock_get_status ( pio_pt->periph_id ) ;
\ 00000008 0450A0E1 MOV R5,R4
\ 0000000C 0400D5E5 LDRB R0,[R5, #+4]
\ 00000010 F310E0E3 MVN R1,#+0xF3
\ 00000014 BF1C41E2 SUB R1,R1,#+0xBF00
\ 00000018 002091E5 LDR R2,[R1, #+0]
\ 0000001C 0110A0E3 MOV R1,#+0x1
\ 00000020 117002E0 AND R7,R2,R1, LSL R0
250
251 //* Enable the PIO Clock
252 at91_clock_open ( pio_pt->periph_id ) ;
\ 00000024 ........ BL at91_clock_open
253
254 //* Read the Data in input of the PIO Controller
255 return_val = pio_pt->pio_base->PIO_PDSR ;
\ 00000028 000095E5 LDR R0,[R5, #+0]
\ 0000002C 3C6090E5 LDR R6,[R0, #+60]
256
257 //* If PIO controller clock was disabled
258 if (( save_clock & (1 << pio_pt->periph_id)) == 0 )
\ 00000030 0400D5E5 LDRB R0,[R5, #+4]
\ 00000034 0110A0E3 MOV R1,#+0x1
\ 00000038 111007E0 AND R1,R7,R1, LSL R0
\ 0000003C 000051E3 CMP R1,#+0x0
259 {
260 //* Disable the PIO Clock
261 at91_clock_close ( pio_pt->periph_id ) ;
\ 00000040 ........ BLEQ at91_clock_close
262 }
263
264 return (return_val);
\ 00000044 0600A0E1 MOV R0,R6
\ 00000048 F080BDE8 LDMIA SP!,{R4-R7,PC} ;; return
265
266 //* End
267 }
268
269 //*----------------------------------------------------------------------------
270 //* Function Name : at91_pio_set_mode
271 //* Object : Modify the mode of PIOs
272 //* Input Parameters : <pio_pt> = PIO Controller Descriptor
273 //* : <mask> = bit mask identifying the PIOs
274 //* : <mode> = the required PIOs configuration
275 //* Output Parameters : none
276 //* Functions called : none
277 //*----------------------------------------------------------------------------
\ In segment NEARFUNC_A, align 4, keep-with-next
\ 00000000 CODE32
278 void at91_pio_set_mode ( const PioCtrlDesc *pio_pt, u_int mask, u_int mode )
279 //* Begin
280 {
281 //* If PIOs required to be filtered
282 if ((mode & PIO_FILTER_BIT) != 0 )
\ at91_pio_set_mode:
\ 00000000 FF3002E2 AND R3,R2,#+0xFF ;; Zero extend
\ 00000004 020013E3 TST R3,#+0x2
\ 00000008 003090E5 LDR R3,[R0, #+0]
283 //* Enable the filter on PIOs
284 pio_pt->pio_base->PIO_IFER = mask ;
\ 0000000C 20108315 STRNE R1,[R3, #+32]
285 //* Else
286 else
287 //* Disable the filter on PIOs
288 pio_pt->pio_base->PIO_IFDR = mask ;
\ 00000010 24108305 STREQ R1,[R3, #+36]
289
290 //* If PIOs required to be open-drain
291 if ((mode & PIO_OPENDRAIN_BIT) != 0 )
\ 00000014 FF2002E2 AND R2,R2,#+0xFF ;; Zero extend
\ 00000018 040012E3 TST R2,#+0x4
\ 0000001C 002090E5 LDR R2,[R0, #+0]
292 //* Enable the filter on PIOs
293 pio_pt->pio_base->PIO_MDER = mask ;
\ 00000020 50108215 STRNE R1,[R2, #+80]
294 //* Else
295 else
296 //* Disable the filter on PIOs
297 pio_pt->pio_base->PIO_MDSR = mask ;
298 //* End
299 }
\ 00000024 0EF0A011 MOVNE PC,LR ;; return
\ 00000028 581082E5 STR R1,[R2, #+88]
\ 0000002C 0EF0A0E1 MOV PC,LR ;; return
300 //*----------------------------------------------------------------------------
301 //* Function Name : at91_clock_set_mode
302 //* Object : Set System Clock Mode.
303 //* Input Parameters : <mode> = mode to define
304 //* Output Parameters : none
305 //* Functions called : at91_error
306 //*----------------------------------------------------------------------------
\ In segment NEARFUNC_A, align 4, keep-with-next
\ 00000000 CODE32
307 void at91_clock_set_mode ( u_int mode )
308 //* Begin
309 {
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