📄 timer.lst
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##############################################################################
# #
# IAR ARM ANSI C/EC++ Compiler V3.10A/W32 05/Nov/2001 14:53:20 #
# Copyright 1999-2001 IAR Systems. All rights reserved. #
# #
# Cpu mode = arm #
# Code model = small #
# Endian = little #
# Source file = C:\At91\software\projects\bench\Source\timer.c #
# Command line = -I C:\Compil\EW23\ARM\INC\ -I ..\..\..\ -lC #
# C:\At91\software\projects\bench\IAR\ARM_external\List\ #
# -lA C:\At91\software\projects\bench\IAR\ARM_external\Li #
# st\ -o C:\At91\software\projects\bench\IAR\ARM_external #
# \Obj\ -e -s9 --debug --cpu_mode arm --code_model small #
# --endian little --cpu=arm7tdmi #
# C:\At91\software\projects\bench\Source\timer.c #
# List file = C:\At91\software\projects\bench\IAR\ARM_external\List\t #
# imer.lst #
# Object file = C:\At91\software\projects\bench\IAR\ARM_external\Obj\ti #
# mer.r79 #
# #
# #
##############################################################################
C:\At91\software\projects\bench\Source\timer.c
1 //*----------------------------------------------------------------------------
2 //* ATMEL Microcontroller Software Support - ROUSSET -
3 //*----------------------------------------------------------------------------
4 //* The software is delivered "AS IS" without warranty or condition of any
5 //* kind, either express, implied or statutory. This includes without
6 //* limitation any warranty or condition with respect to merchantability or
7 //* fitness for any particular purpose, or against the infringements of
8 //* intellectual property rights of others.
9 //*----------------------------------------------------------------------------
10 //* File Name : timer.c
11 //* Object : bench
12 //*
13 //* 1.0 15/05/01 JPP : Creation
14 //*----------------------------------------------------------------------------
15
16
17 #include "periph/timer_counter/lib_tc.h"
18
19 #define CHRONO_TC_INIT ( TC_CLKS_MCK2 |\
20 TC_WAVE | TC_CPCSTOP |\
21 TC_ASWTRG_CLEAR_OUTPUT )
22
23 #define CHRONO_TC0_MODE ( TC_CLKS_MCK2 |\
24 TC_WAVE |\
25 TC_CPCTRG |\
26 TC_ACPA_CLEAR_OUTPUT |\
27 TC_ACPC_SET_OUTPUT |\
28 TC_ASWTRG_SET_OUTPUT )
29
30 #define CHRONO_TC1_MODE ( TC_CLKS_XC1 |\
31 TC_WAVE |\
32 TC_CPCTRG |\
33 TC_ACPA_CLEAR_OUTPUT |\
34 TC_ACPC_SET_OUTPUT |\
35 TC_ASWTRG_SET_OUTPUT )
36
37 #define CHRONO_TC2_MODE ( TC_CLKS_XC2 |\
38 TC_WAVE |\
39 TC_CPCTRG |\
40 TC_ACPA_CLEAR_OUTPUT |\
41 TC_ACPC_SET_OUTPUT |\
42 TC_ASWTRG_SET_OUTPUT )
43
44 //*----------------------------------------------------------------------------
45 //* Function Name : at91_time_rtc_mcki
46 //* Object : Calculate the MCKI
47 //* Input Parameters : <TC_pt> timer descriptor
48 //* Output Parameters :
49 //*----------------------------------------------------------------------------
\ In segment NEARFUNC_A, align 4
\ 00000000 CODE32
50 void at91_tc_open_count( const TCBlockDesc *TC_pt )
51 //* Begin
52 {
\ at91_tc_open_count:
\ 00000000 70402DE9 STMDB SP!,{R4-R6,LR} ;; Push
53
54 u_int tmp;
^
Warning[Pe550]: variable "tmp" was set but never used
55 StructTCBlock *tc_ptr = (StructTCBlock *)TC_pt->tc0_desc->tc_base ;
\ 00000004 0060A0E1 MOV R6,R0
\ 00000008 000096E5 LDR R0,[R6, #+0]
\ 0000000C 004090E5 LDR R4,[R0, #+0]
56
57 //* Open timer for counting
58 //* Open the Timer Counter channels
59 at91_tc_open (TC_pt->tc0_desc, CHRONO_TC_INIT, TRUE, FALSE);
\ 00000010 0030A0E3 MOV R3,#+0x0
\ 00000014 0120A0E3 MOV R2,#+0x1
\ 00000018 E0109FE5 LDR R1,??at91_tc_open_count_0 ;; #+0x808040
\ 0000001C ........ BL at91_tc_open
60 at91_tc_open (TC_pt->tc1_desc, CHRONO_TC_INIT, TRUE, FALSE);
\ 00000020 0030A0E3 MOV R3,#+0x0
\ 00000024 0120A0E3 MOV R2,#+0x1
\ 00000028 D0109FE5 LDR R1,??at91_tc_open_count_0 ;; #+0x808040
\ 0000002C 040096E5 LDR R0,[R6, #+4]
\ 00000030 ........ BL at91_tc_open
61 at91_tc_open (TC_pt->tc2_desc, CHRONO_TC_INIT, TRUE, FALSE);
\ 00000034 0030A0E3 MOV R3,#+0x0
\ 00000038 0120A0E3 MOV R2,#+0x1
\ 0000003C BC109FE5 LDR R1,??at91_tc_open_count_0 ;; #+0x808040
\ 00000040 080096E5 LDR R0,[R6, #+8]
\ 00000044 ........ BL at91_tc_open
62
63 //* Setup TIOA outputs to 0
64 tc_ptr->TC[0].TC_RC = 2 ;
\ 00000048 0200A0E3 MOV R0,#+0x2
\ 0000004C 1C0084E5 STR R0,[R4, #+28]
65 tc_ptr->TC[0].TC_CCR = TC_CLKEN ;
\ 00000050 0100A0E3 MOV R0,#+0x1
\ 00000054 000084E5 STR R0,[R4, #+0]
66 tc_ptr->TC[1].TC_RC = 2 ;
\ 00000058 0200A0E3 MOV R0,#+0x2
\ 0000005C 5C0084E5 STR R0,[R4, #+92]
67 tc_ptr->TC[1].TC_CCR = TC_CLKEN ;
\ 00000060 0100A0E3 MOV R0,#+0x1
\ 00000064 400084E5 STR R0,[R4, #+64]
68 tc_ptr->TC[2].TC_RC = 2 ;
\ 00000068 0200A0E3 MOV R0,#+0x2
\ 0000006C 9C0084E5 STR R0,[R4, #+156]
69 tc_ptr->TC[2].TC_CCR = TC_CLKEN ;
\ 00000070 0100A0E3 MOV R0,#+0x1
\ 00000074 800084E5 STR R0,[R4, #+128]
70 tc_ptr->TC_BCR = TC_SYNC ;
\ 00000078 C00084E5 STR R0,[R4, #+192]
71
72 //* Define the Timer Counter channel Chaining
73 tc_ptr->TC_BMR = TC_TIOA0XC1 | TC_TIOA1XC2 ;
\ 0000007C 3800A0E3 MOV R0,#+0x38
\ 00000080 C40084E5 STR R0,[R4, #+196]
74
75 //* Setup Timer 0
76 tc_ptr->TC[0].TC_CMR = CHRONO_TC0_MODE ;
\ 00000084 1B09A0E3 MOV R0,#+0x6C000
\ 00000088 010580E2 ADD R0,R0,#+0x400000
\ 0000008C 040084E5 STR R0,[R4, #+4]
77 tc_ptr->TC[0].TC_RC = 1000 ;
\ 00000090 FA0FA0E3 MOV R0,#+0x3E8
\ 00000094 1C0084E5 STR R0,[R4, #+28]
78 tc_ptr->TC[0].TC_RA = 500 ;
\ 00000098 7D0FA0E3 MOV R0,#+0x1F4
\ 0000009C 140084E5 STR R0,[R4, #+20]
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