📄 timer.s79
字号:
NAME timer
RTMODEL "__code_model", "small"
RTMODEL "__cpu_mode", "arm"
RTMODEL "__data_model", "absolute"
RTMODEL "__endian", "little"
RTMODEL "__rt_version", "2"
RTMODEL "__thumb_aware", "enabled"
RSEG CSTACK:DATA:NOROOT(2)
EXTERN at91_tc_open
FUNCTION at91_tc_open,0202H
EXTERN at91_tc_close
FUNCTION at91_tc_close,0202H
PUBLIC at91_tc_open_count
FUNCTION at91_tc_open_count,0203H
LOCFRAME CSTACK, 16, STACK
PUBLIC at91_tc_start
FUNCTION at91_tc_start,0203H
PUBLIC at91_tc_stop
FUNCTION at91_tc_stop,0203H
LOCFRAME CSTACK, 12, STACK
; C:\At91\software\projects\bench\Source\timer.c
; 1 //*----------------------------------------------------------------------------
; 2 //* ATMEL Microcontroller Software Support - ROUSSET -
; 3 //*----------------------------------------------------------------------------
; 4 //* The software is delivered "AS IS" without warranty or condition of any
; 5 //* kind, either express, implied or statutory. This includes without
; 6 //* limitation any warranty or condition with respect to merchantability or
; 7 //* fitness for any particular purpose, or against the infringements of
; 8 //* intellectual property rights of others.
; 9 //*----------------------------------------------------------------------------
; 10 //* File Name : timer.c
; 11 //* Object : bench
; 12 //*
; 13 //* 1.0 15/05/01 JPP : Creation
; 14 //*----------------------------------------------------------------------------
; 15
; 16
; 17 #include "periph/timer_counter/lib_tc.h"
; 18
; 19 #define CHRONO_TC_INIT ( TC_CLKS_MCK2 |\
; 20 TC_WAVE | TC_CPCSTOP |\
; 21 TC_ASWTRG_CLEAR_OUTPUT )
; 22
; 23 #define CHRONO_TC0_MODE ( TC_CLKS_MCK2 |\
; 24 TC_WAVE |\
; 25 TC_CPCTRG |\
; 26 TC_ACPA_CLEAR_OUTPUT |\
; 27 TC_ACPC_SET_OUTPUT |\
; 28 TC_ASWTRG_SET_OUTPUT )
; 29
; 30 #define CHRONO_TC1_MODE ( TC_CLKS_XC1 |\
; 31 TC_WAVE |\
; 32 TC_CPCTRG |\
; 33 TC_ACPA_CLEAR_OUTPUT |\
; 34 TC_ACPC_SET_OUTPUT |\
; 35 TC_ASWTRG_SET_OUTPUT )
; 36
; 37 #define CHRONO_TC2_MODE ( TC_CLKS_XC2 |\
; 38 TC_WAVE |\
; 39 TC_CPCTRG |\
; 40 TC_ACPA_CLEAR_OUTPUT |\
; 41 TC_ACPC_SET_OUTPUT |\
; 42 TC_ASWTRG_SET_OUTPUT )
; 43
; 44 //*----------------------------------------------------------------------------
; 45 //* Function Name : at91_time_rtc_mcki
; 46 //* Object : Calculate the MCKI
; 47 //* Input Parameters : <TC_pt> timer descriptor
; 48 //* Output Parameters :
; 49 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:REORDER:NOROOT(2)
CFI Names cfiNames0
CFI StackFrame CFA SP HUGEDATA
CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, SP:32, LR:32
CFI VirtualResource RET:32
CFI EndNames cfiNames0
CFI Common cfiCommon0 Using cfiNames0
CFI CodeAlign 4
CFI DataAlign 4
CFI ReturnAddress RET CODE
CFI CFA SP+0
CFI R0 Undefined
CFI R1 Undefined
CFI R2 Undefined
CFI R3 Undefined
CFI R4 SameValue
CFI R5 SameValue
CFI R6 SameValue
CFI R7 SameValue
CFI R8 SameValue
CFI R9 SameValue
CFI R10 SameValue
CFI R11 SameValue
CFI R12 Undefined
CFI LR Undefined
CFI RET LR
CFI EndCommon cfiCommon0
CFI Block cfiBlock0 Using cfiCommon0
CFI Function at91_tc_open_count
CODE32
; 50 void at91_tc_open_count( const TCBlockDesc *TC_pt )
; 51 //* Begin
; 52 {
at91_tc_open_count:
STMDB SP!,{R4-R6,LR} ;; Push
CFI RET Frame(CFA, -4)
CFI R6 Frame(CFA, -8)
CFI R5 Frame(CFA, -12)
CFI R4 Frame(CFA, -16)
CFI CFA SP+16
; 53
; 54 u_int tmp;
; 55 StructTCBlock *tc_ptr = (StructTCBlock *)TC_pt->tc0_desc->tc_base ;
MOV R6,R0
LDR R0,[R6, #+0]
LDR R4,[R0, #+0]
; 56
; 57 //* Open timer for counting
; 58 //* Open the Timer Counter channels
; 59 at91_tc_open (TC_pt->tc0_desc, CHRONO_TC_INIT, TRUE, FALSE);
MOV R3,#+0x0
MOV R2,#+0x1
LDR R1,??at91_tc_open_count_0 ;; #+0x808040
BL at91_tc_open
; 60 at91_tc_open (TC_pt->tc1_desc, CHRONO_TC_INIT, TRUE, FALSE);
MOV R3,#+0x0
MOV R2,#+0x1
LDR R1,??at91_tc_open_count_0 ;; #+0x808040
LDR R0,[R6, #+4]
BL at91_tc_open
; 61 at91_tc_open (TC_pt->tc2_desc, CHRONO_TC_INIT, TRUE, FALSE);
MOV R3,#+0x0
MOV R2,#+0x1
LDR R1,??at91_tc_open_count_0 ;; #+0x808040
LDR R0,[R6, #+8]
BL at91_tc_open
; 62
; 63 //* Setup TIOA outputs to 0
; 64 tc_ptr->TC[0].TC_RC = 2 ;
MOV R0,#+0x2
STR R0,[R4, #+28]
; 65 tc_ptr->TC[0].TC_CCR = TC_CLKEN ;
MOV R0,#+0x1
STR R0,[R4, #+0]
; 66 tc_ptr->TC[1].TC_RC = 2 ;
MOV R0,#+0x2
STR R0,[R4, #+92]
; 67 tc_ptr->TC[1].TC_CCR = TC_CLKEN ;
MOV R0,#+0x1
STR R0,[R4, #+64]
; 68 tc_ptr->TC[2].TC_RC = 2 ;
MOV R0,#+0x2
STR R0,[R4, #+156]
; 69 tc_ptr->TC[2].TC_CCR = TC_CLKEN ;
MOV R0,#+0x1
STR R0,[R4, #+128]
; 70 tc_ptr->TC_BCR = TC_SYNC ;
STR R0,[R4, #+192]
; 71
; 72 //* Define the Timer Counter channel Chaining
; 73 tc_ptr->TC_BMR = TC_TIOA0XC1 | TC_TIOA1XC2 ;
MOV R0,#+0x38
STR R0,[R4, #+196]
; 74
; 75 //* Setup Timer 0
; 76 tc_ptr->TC[0].TC_CMR = CHRONO_TC0_MODE ;
MOV R0,#+0x6C000
ADD R0,R0,#+0x400000
STR R0,[R4, #+4]
; 77 tc_ptr->TC[0].TC_RC = 1000 ;
MOV R0,#+0x3E8
STR R0,[R4, #+28]
; 78 tc_ptr->TC[0].TC_RA = 500 ;
MOV R0,#+0x1F4
STR R0,[R4, #+20]
; 79 tc_ptr->TC[0].TC_CCR = TC_CLKEN ;
MOV R0,#+0x1
STR R0,[R4, #+0]
; 80
; 81 //* Setup Timer 1
; 82 tc_ptr->TC[1].TC_CMR = CHRONO_TC1_MODE ;
LDR R0,??at91_tc_open_count_0+4 ;; #+0x46C006
STR R0,[R4, #+68]
; 83 tc_ptr->TC[1].TC_RC = 1000 ;
MOV R0,#+0x3E8
STR R0,[R4, #+92]
; 84 tc_ptr->TC[1].TC_RA = 500 ;
MOV R0,#+0x1F4
STR R0,[R4, #+84]
; 85 tc_ptr->TC[1].TC_CCR = TC_CLKEN ;
MOV R0,#+0x1
STR R0,[R4, #+64]
; 86
; 87 //* Setup Timer 2
; 88 tc_ptr->TC[2].TC_CMR = CHRONO_TC2_MODE ;
LDR R0,??at91_tc_open_count_0+8 ;; #+0x46C007
STR R0,[R4, #+132]
; 89 tc_ptr->TC[2].TC_RC = 0xFFFF ;
MOV R0,#+0xFF
ADD R0,R0,#+0xFF00
STR R0,[R4, #+156]
; 90 tc_ptr->TC[2].TC_CCR = TC_CLKEN ;
MOV R0,#+0x1
STR R0,[R4, #+128]
; 91
; 92 //* Clear the status
; 93 tmp = tc_ptr->TC[0].TC_SR ;
LDR R0,[R4, #+32]
; 94 tmp = tc_ptr->TC[1].TC_SR ;
LDR R0,[R4, #+96]
; 95 tmp = tc_ptr->TC[2].TC_SR ;
LDR R0,[R4, #+160]
; 96
; 97 //* Trig Timer2
; 98 tc_ptr->TC[2].TC_CCR = TC_SWTRG ;
MOV R0,#+0x4
STR R0,[R4, #+128]
; 99
; 100 //* Trig Timer1, set TIOA and effective clear timer 2
; 101 tc_ptr->TC[1].TC_CCR = TC_SWTRG ;
STR R0,[R4, #+64]
; 102
; 103 }
LDMIA SP!,{R4-R6,PC} ;; return
DATA
??at91_tc_open_count_0:
DC32 +0x808040
DC32 +0x46C006
DC32 +0x46C007
CFI EndBlock cfiBlock0
; 104 //*----------------------------------------------------------------------------
; 105 //* Function Name : at91_tc_start
; 106 //* Object :
; 107 //* Input Parameters : <TC_pt> timer descriptor
; 108 //* Output Parameters :
; 109 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:REORDER:NOROOT(2)
CFI Block cfiBlock1 Using cfiCommon0
CFI Function at91_tc_start
CODE32
; 110 void at91_tc_start( const TCBlockDesc *TC_pt )
; 111 {
; 112 //* -- Start timer by Software Trigger
; 113 //* Trig Timer0, set TIOA and effective clear timer 1
; 114 TC_pt->tc0_desc->tc_base->TC_CCR = TC_SWTRG ;
at91_tc_start:
MOV R1,#+0x4
LDR R2,[R0, #+0]
LDR R0,[R2, #+0]
STR R1,[R0, #+0]
; 115 }
MOV PC,LR ;; return
CFI EndBlock cfiBlock1
; 116 //*----------------------------------------------------------------------------
; 117 //* Function Name : at91_tc_stop
; 118 //* Object :
; 119 //* Input Parameters : <TC_pt> timer descriptor
; 120 //* Output Parameters :
; 121 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:REORDER:NOROOT(2)
CFI Block cfiBlock2 Using cfiCommon0
CFI Function at91_tc_stop
CODE32
; 122 u_int at91_tc_stop( const TCBlockDesc *TC_pt )
; 123 {
at91_tc_stop:
STMDB SP!,{R4,R5,LR} ;; Push
CFI RET Frame(CFA, -4)
CFI R5 Frame(CFA, -8)
CFI R4 Frame(CFA, -12)
CFI CFA SP+12
; 124 u_int mcki;
; 125 StructTCBlock *tc_ptr = (StructTCBlock *)TC_pt->tc0_desc->tc_base ;
MOV R4,R0
LDR R1,[R4, #+0]
LDR R0,[R1, #+0]
; 126
; 127 //* Disable the clock of the Timer Counter channel 0
; 128 TC_pt->tc0_desc->tc_base->TC_CCR = TC_CLKDIS ;
MOV R2,#+0x2
STR R2,[R0, #+0]
; 129
; 130 //* Compute number of microseconds from counter values
; 131 mcki = tc_ptr->TC[0].TC_CV ;
ADD R0,R0,#+0x10
LDR R5,[R0, #+0]
; 132 mcki += ( tc_ptr->TC[1].TC_CV * 1000 ) ;
LDR R1,[R0, #+64]
MOV R2,#+0x3E8
MLA R5,R1,R2,R5
; 133 mcki += ( tc_ptr->TC[2].TC_CV * 1000000 ) ;
LDR R1,[R0, #+128]
MOV R0,#+0x240
ADD R0,R0,#+0xF4000
MLA R5,R1,R0,R5
; 134 // TIMER CLOCK MCKI / 2
; 135 mcki = mcki*2;
; 136
; 137 //* Disable the clock and reset the timer
; 138 // Close the timer
; 139 at91_tc_close (TC_pt->tc0_desc);
LDR R0,[R4, #+0]
BL at91_tc_close
; 140 at91_tc_close (TC_pt->tc1_desc);
LDR R0,[R4, #+4]
BL at91_tc_close
; 141 at91_tc_close (TC_pt->tc2_desc);
LDR R0,[R4, #+8]
BL at91_tc_close
; 142
; 143 return mcki;
MOV R0,R5, LSL #+1
LDMIA SP!,{R4,R5,PC} ;; return
CFI EndBlock cfiBlock2
; 144 //* End
; 145 }
END
;
; 380 bytes in segment NEARFUNC_A
;
; 380 bytes of CODE memory
;
;Errors: none
;Warnings: 1
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -