📄 lib_at91.s79
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TST R5,R0
MOV R0,#+0x1
LDRB R1,[R8, #+9]
MOV R2,R0
LDRB R3,[R8, #+8]
MOV R2,R2, LSL R3
BEQ ??at91_usart_open_0
; 402 {
; 403 //* Define RXD, TXD and SCK as peripheral
; 404 at91_pio_close ( usart_pt->pio_ctrl,
; 405 (1 << usart_pt->pin_txd) |
; 406 (1 << usart_pt->pin_rxd) |
; 407 (1 << usart_pt->pin_sck) ) ;
ORR R0,R2,R0, LSL R1
MOV R1,#+0x1
LDRB R2,[R8, #+10]
ORR R1,R0,R1, LSL R2
B ??at91_usart_open_1
; 408 }
; 409 //* Else
; 410 else
; 411 {
; 412 //* Define RXD and TXD as peripheral
; 413 at91_pio_close ( usart_pt->pio_ctrl,
; 414 (1 << usart_pt->pin_txd) |
; 415 (1 << usart_pt->pin_rxd) ) ;
??at91_usart_open_0:
ORR R1,R2,R0, LSL R1
??at91_usart_open_1:
LDR R0,[R8, #+4]
BL at91_pio_close
; 416 //* EndIf
; 417 }
; 418
; 419 //* Reset receiver and transmitter
; 420 usart_pt->usart_base->US_CR = US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS ;
MOV R0,#+0xAC
LDR R1,[R8, #+0]
STR R0,[R1, #+0]
; 421
; 422 //* Clear Transmit and Receive Counters
; 423 usart_pt->usart_base->US_RCR = 0 ;
MOV R0,#+0x0
LDR R1,[R8, #+0]
STR R0,[R1, #+52]
; 424 usart_pt->usart_base->US_TCR = 0 ;
LDR R1,[R8, #+0]
STR R0,[R1, #+60]
; 425
; 426 //* Define the baud rate divisor register
; 427 usart_pt->usart_base->US_BRGR = speed ;
LDR R0,[R8, #+0]
STR R6,[R0, #+32]
; 428
; 429 //* Define the USART mode
; 430 usart_pt->usart_base->US_MR = mode ;
LDR R0,[R8, #+0]
STR R5,[R0, #+4]
; 431
; 432 //* Write the Timeguard Register
; 433 usart_pt->usart_base->US_TTGR = timeguard ;
LDR R0,[R8, #+0]
STR R7,[R0, #+40]
; 434
; 435 //* Enable receiver and transmitter
; 436 usart_pt->usart_base->US_CR = US_RXEN | US_TXEN ;
MOV R0,#+0x50
LDR R1,[R8, #+0]
STR R0,[R1, #+0]
; 437
; 438 //* End
; 439 }
LDMIA SP!,{R4-R8,PC} ;; return
CFI EndBlock cfiBlock10
; 440
; 441 //*----------------------------------------------------------------------------
; 442 //* Function Name : at91_usart_close
; 443 //* Object : Disable an USART.
; 444 //* Input Parameters : <usart_pt> = USART Descriptor pointer
; 445 //* Output Parameters : none
; 446 //* Functions called : at91_clock_close, at91_pio_open
; 447 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock11 Using cfiCommon0
CFI Function at91_usart_close
CODE32
; 448 void at91_usart_close ( const UsartDesc *usart_pt )
; 449 //* Begin
; 450 {
at91_usart_close:
STMDB SP!,{R4,R5,LR} ;; Push
CFI RET Frame(CFA, -4)
CFI R5 Frame(CFA, -8)
CFI R4 Frame(CFA, -12)
CFI CFA SP+12
; 451 //* Disable the clock on the Peripheral
; 452 at91_clock_close ( usart_pt->periph_id ) ;
MOV R4,R0
LDRB R0,[R4, #+11]
BL at91_clock_close
; 453
; 454 //* Define all USARTs pins as pio
; 455 at91_pio_open ( usart_pt->pio_ctrl,
; 456 (1 << usart_pt->pin_txd) |
; 457 (1 << usart_pt->pin_rxd) |
; 458 (1 << usart_pt->pin_sck),
; 459 RESET_PIO_CONF ) ;
MOV R2,#+0x0
MOV R0,#+0x1
LDRB R1,[R4, #+9]
MOV R3,R0
LDRB R5,[R4, #+8]
MOV R3,R3, LSL R5
ORR R0,R3,R0, LSL R1
MOV R1,#+0x1
LDRB R3,[R4, #+10]
ORR R1,R0,R1, LSL R3
LDR R0,[R4, #+4]
BL at91_pio_open
; 460
; 461 //* Disable all interrupts
; 462 usart_pt->usart_base->US_IDR = 0xFFFFFFFF ;
MVN R0,#+0x0
LDR R1,[R4, #+0]
STR R0,[R1, #+12]
; 463
; 464 //* Abort the Peripheral Data Transfers
; 465 usart_pt->usart_base->US_RCR = 0 ;
MOV R0,#+0x0
LDR R1,[R4, #+0]
STR R0,[R1, #+52]
; 466 usart_pt->usart_base->US_TCR = 0 ;
LDR R1,[R4, #+0]
STR R0,[R1, #+60]
; 467
; 468 //* Disable receiver and transmitter and stop any activity immediately
; 469 usart_pt->usart_base->US_CR = US_TXDIS | US_RXDIS | US_RSTTX | US_RSTRX ;
MOV R0,#+0xAC
LDR R1,[R4, #+0]
STR R0,[R1, #+0]
; 470
; 471 //* End
; 472 }
LDMIA SP!,{R4,R5,PC} ;; return
CFI EndBlock cfiBlock11
; 473
; 474 //*----------------------------------------------------------------------------
; 475 //* Function Name : at91_usart_get_status
; 476 //* Object : Read the Status Register of an USART.
; 477 //* Input Parameters : <usart_pt> = USART Descriptor pointer
; 478 //* Output Parameters : USART Status Register
; 479 //* Functions called : none
; 480 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock12 Using cfiCommon0
CFI Function at91_usart_get_status
CODE32
; 481 u_int at91_usart_get_status ( const UsartDesc *usart_pt )
; 482 //* Begin
; 483 {
; 484 //* Return the Control Status Register Value
; 485 return ( usart_pt->usart_base->US_CSR ) ;
at91_usart_get_status:
LDR R1,[R0, #+0]
LDR R0,[R1, #+20]
MOV PC,LR ;; return
CFI EndBlock cfiBlock12
; 486
; 487 //* End
; 488 }
; 489
; 490 //*----------------------------------------------------------------------------
; 491 //* Function Name : at91_usart_trig_cmd
; 492 //* Object : Reset the Status Bits of an USART.
; 493 //* Input Parameters : <usart_pt> = USART Descriptor pointer
; 494 //* : <cmd> = command mask
; 495 //* Output Parameters : none
; 496 //* Functions called : none
; 497 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CODE32
; 498 void at91_usart_trig_cmd ( const UsartDesc *usart_pt, u_int cmd )
at91_usart_trig_cmd:
REQUIRE ??Subroutine0_0
; 499 //* Begin
; 500 {
; 501 //* Write the command in the Control Register
; 502 usart_pt->usart_base->US_CR = cmd ;
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock13 Using cfiCommon0
CFI NoFunction
??Subroutine0_0:
LDR R2,[R0, #+0]
STR R1,[R2, #+0]
MOV PC,LR ;; return
CFI EndBlock cfiBlock13
; 503
; 504 //* End
; 505 }
; 506
; 507 //*----------------------------------------------------------------------------
; 508 //* Function Name : at91_usart_write
; 509 //* Object : Store a character in the Transmit hold Register.
; 510 //* Input Parameters : <usart_pt> = USART Descriptor pointer
; 511 //* : <character> = character to transmit
; 512 //* Output Parameters : none
; 513 //* Functions called : none
; 514 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock14 Using cfiCommon0
CFI Function at91_usart_write
CODE32
; 515 void at91_usart_write ( const UsartDesc *usart_pt, u_int character )
; 516 //* Begin
; 517 {
; 518 //* Write the character in the Transmit Holding Register
; 519 usart_pt->usart_base->US_THR = character ;
at91_usart_write:
B ??Subroutine2_0
CFI EndBlock cfiBlock14
; 520
; 521 //* End
; 522 }
; 523
; 524 //*----------------------------------------------------------------------------
; 525 //* Function Name : at91_usart_read
; 526 //* Object : Read a character from the Receive Register
; 527 //* Input Parameters : <usart_pt> = USART Descriptor pointer
; 528 //* : <pt_char> = point where to save the received character
; 529 //* Output Parameters : none
; 530 //* Functions called : none
; 531 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock15 Using cfiCommon0
CFI Function at91_usart_read
CODE32
; 532 void at91_usart_read ( const UsartDesc *usart_pt, u_int *pt_char )
; 533 //* Begin
; 534 {
; 535 //* Read the received character and store it
; 536 *pt_char = usart_pt->usart_base->US_RHR ;
at91_usart_read:
LDR R2,[R0, #+0]
LDR R0,[R2, #+24]
B ??Subroutine1_1
CFI EndBlock cfiBlock15
; 537
; 538 //* End
; 539 }
; 540
; 541 //*-----------------------------------------------------------------------------
; 542 //* Function Name : at91_usart_send_frame
; 543 //* Object : Transmit a complete frame.
; 544 //* Input Parameters : <usart_pt> = USART pointer
; 545 //* : <pt_buffer> = the address of the receive buffer
; 546 //* : <max_size> = the maximum number of bytes to be
; 547 //* : received
; 548 //* : <timeout> = the inter-character time delay in number
; 549 //* : of byte
; 550 //* Output Parameters :
; 551 //* Functions called : none
; 552 //*-----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock16 Using cfiCommon0
CFI Function at91_usart_send_frame
CODE32
; 553 u_int at91_usart_send_frame ( const UsartDesc *usart_pt, char *pt_buffer, u_int size_buf )
; 554 //* Begin
; 555 {
at91_usart_send_frame:
STMDB SP!,{R4} ;; Push
CFI R4 Frame(CFA, -4)
CFI CFA SP+4
; 556
; 557 //* Wait for previous transfer finished
; 558 while (( usart_pt->usart_base->US_CSR & US_ENDTX ) == 0 ) ;
??at91_usart_send_frame_0:
LDR R3,[R0, #+0]
LDR R4,[R3, #+20]
AND R4,R4,#+0xFF ;; Zero extend
TST R4,#+0x10
BEQ ??at91_usart_send_frame_0
; 559
; 560 //* Store the address of the buffer
; 561 usart_pt->usart_base->US_TPR = (u_int) pt_buffer ;
STR R1,[R3, #+56]
; 562
; 563 //* Store the number of bytes to transmit
; 564 usart_pt->usart_base->US_TCR = size_buf ;
LDR R1,[R0, #+0]
STR R2,[R1, #+60]
; 565
; 566 //* Return true
; 567 return ( TRUE ) ;
MOV R0,#+0x1
LDMIA SP!,{R4} ;; Pop
CFI R4 SameValue
CFI CFA SP+0
MOV PC,LR ;; return
CFI EndBlock cfiBlock16
; 568 }
; 569 //* End
; 570
; 571 //*-----------------------------------------------------------------------------
; 572 //* Function Name : at91_usart_receive_frame
; 573 //* Object : Receive a complete frame.
; 574 //* Input Parameters : <usart_pt> = USART pointer
; 575 //* : <pt_buffer> = the address of the receive buffer
; 576 //* : <max_size> = the maximum number of bytes to be
; 577 //* : received
; 578 //* : <timeout> = the inter-character time delay in number
; 579 //* : of byte
; 580 //* Output Parameters :
; 581 //* Functions called : none
; 582 //*-----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock17 Using cfiCommon0
CFI Function at91_usart_receive_frame
CODE32
; 583 u_int at91_usart_receive_frame ( const UsartDesc *usart_pt, char *pt_buffer, u_int max_size , u_int timeout )
; 584 //* Begin
; 585 {
at91_usart_receive_frame:
STMDB SP!,{R4,R5} ;; Push
CFI R5 Frame(CFA, -4)
CFI R4 Frame(CFA, -8)
CFI CFA SP+8
; 586
; 587 //* Store the timeout value
; 588 usart_pt->usart_base->US_RTOR = (timeout * 10 / 4) ;
MOV R4,#+0xA
MUL R5,R3,R4
MOV R3,R5, LSR #+2
LDR R4,[R0, #+0]
STR R3,[R4, #+36]
; 589
; 590 //* Restart the timeout logic
; 591 usart_pt->usart_base->US_CR = US_STTTO ;
MOV R3,#+0x800
LDR R4,[R0, #+0]
STR R3,[R4, #+0]
; 592
; 593 //* Store the address of the buffer
; 594 usart_pt->usart_base->US_RPR = (u_int) pt_buffer ;
LDR R3,[R0, #+0]
STR R1,[R3, #+48]
; 595
; 596 //* Store the number of bytes to receive
; 597 usart_pt->usart_base->US_RCR = max_size ;
LDR R1,[R0, #+0]
STR R2,[R1, #+52]
; 598
; 599 //* Return true
; 600 return ( TRUE ) ;
MOV R0,#+0x1
LDMIA SP!,{R4,R5} ;; Pop
CFI R4 SameValue
CFI R5 SameValue
CFI CFA SP+0
MOV PC,LR ;; return
CFI EndBlock cfiBlock17
; 601 }
; 602 //* End
; 603 //*----------------------------------------------------------------------------
; 604 //* Function Name : at91_tc_open
; 605 //* Object : Initialize Timer Counter Channel and enable is clock
; 606 //* Input Parameters : <tc_pt> = TC Channel Descriptor Pointer
; 607 //* <mode> = Timer Counter Mode
; 608 //* : <tioa> = TIOA enabled as peripheral if non null
; 609 //* : <tiob> = TIOB enabled as peripheral if non null
; 610 //* Output Parameters : None
; 611 //* Functions called : at91_clock_open, at91_pio_close
; 612 //*----------------------------------------------------------------------------
RSEG NEARFUNC_A:CODE:NOROOT(2)
CFI Block cfiBlock18 Using cfiCommon0
CFI Function at91_tc_open
CODE32
; 613 void at91_tc_open ( const TCDesc *tc_pt, u_int mode, u_int tioa, u_int tiob )
; 614 //* Begin
; 615 {
at91_tc_open:
STMDB SP!,{R4-R8,LR} ;; Push
CFI RET Frame(CFA, -4)
CFI R8 Frame(CFA, -8)
CFI R7 Frame(CFA, -12)
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