at91irq_asm_handler.paf.arm

ARM入门的好帮手.包含了从简单到相对较复杂的程序.

	EXPORT	__tx_timer_handler
	EXPORT	__at91_usart0_handler
	EXPORT	__at91_irq0_handler

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#define ARM_MODE_USER                0x10
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#define ARM_MODE_FIQ                 0x11
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#define ARM_MODE_IRQ                 0x12
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#define ARM_MODE_SVC                 0x13
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#define ARM_MODE_ABORT               0x17
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#define ARM_MODE_UNDEF               0x1B
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#define ARM_MODE_SYS                 0x1F
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#define I_BIT                        0x80
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#define F_BIT                        0x40
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#define T_BIT                        0x20
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            END
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#define AIC_PRIOR                            0x07    
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#define AIC_SRCTYPE                          0x60    
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#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE      0x00    
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#define AIC_SRCTYPE_INT_EDGE_TRIGGERED       0x40    
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#define AIC_SRCTYPE_EXT_LOW_LEVEL            0x00    
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#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE        0x40    
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#define AIC_SRCTYPE_EXT_HIGH_LEVEL           0x80    
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#define AIC_SRCTYPE_EXT_POSITIVE_EDGE        0x60    
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#define AIC_IRQID                    0x1F            
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#define AIC_NFIQ                     0x01            
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#define AIC_NIRQ                     0x02            
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#define AIC_BASE                     0xFFFFF000
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	END
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#define NB_TC_CHANNEL        3
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#define TC_CLKEN             0x1             
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#define TC_CLKDIS            0x2             
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#define TC_SWTRG             0x4             
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#define TC_TCCLKS            0x00000007      
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#define TC_CLKI              0x00000008      
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#define TC_BURST             0x00000030      
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#define TC_LDBSTOP           0x00000040      
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#define TC_CPCSTOP           0x00000040      
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#define TC_LDBDIS            0x00000080      
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#define TC_CPCDIS            0x00000080      
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#define TC_ETRGEDG           0x00000300      
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#define TC_EEVTEDG           0x00000300      
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#define TC_ABETRG            0x00000400      
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#define TC_EEVT              0x00000C00      
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#define TC_ENETRG            0x00001000      
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#define TC_CPCTRG            0x00004000      
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#define TC_WAVE              0x00008000      
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#define TC_LDRA              0x00030000      
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#define TC_ACPA              0x00030000      
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#define TC_LDRB              0x000C0000      
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#define TC_ACPC              0x000C0000      
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#define TC_AEEVT             0x00300000      
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#define TC_ASWTRG            0x00C00000      
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#define TC_BCPB              0x03000000      
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#define TC_BCPC              0x0C000000      
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#define TC_BEEVT             0x30000000      
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#define TC_BSWTRG            0xC0000000      
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#define TC_COVFS             0x01        
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#define TC_LOVRS             0x02        
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#define TC_CPAS              0x04        
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#define TC_CPBS              0x08        
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#define TC_CPCS              0x10        
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#define TC_LDRAS             0x20        
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#define TC_LDRBS             0x40        
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#define TC_ETRGS             0x80        
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#define TC_CLKSTA            0x10000     
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#define TC_MTIOA             0x20000     
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#define TC_MTIOB             0x40000     
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#define TC_SYNC              0x1         
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#define TC_TC0XC0S           (0x3 << 0)     
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#define TC_TC1XC1S           (0x3 << 2)     
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#define TC_TC2XC2S           (0x3 << 4)     
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            END
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#define     TC0_BASE             0xFFFE0000      
    
    


    TC0_SOURCE_VECTOR = 0xFFFFF090      
    TC0_SOURCE_MODE =	0xFFFFF010      
    TC0_IRQEN_BIT  =    0x10            

    TX_TC0_IRQ_MODE =  	0x21            
    TX_TC0_MODE  =     	0xC001          
    TX_TICK_RATE =      0x8FFF          
    					


    .text
    .align  4



















    .globl  _tx_initialize_low_level
_tx_initialize_low_level:

    
    
    

    
    
    LDR     a2, SYS_STACK_PTR               
    STR     sp, [a2]                        

    
    LDR     a1, FREE_MEMORY                 

    
    MOV     a2, a1                          
    LDR     a3, FIQ_STACK_SIZE              
    MOV     a4, ARM_MODE_FIQ                
    MSR     CPSR_cxsf, a4                   
    ADD     a2, a2, a3                      
    BIC     a2, a2, 3                       
    SUB     a2, a2, 4                       
    MOV     sp, a2                          
    MOV     sl, 0                           
    MOV     fp, 0                           
    LDR     a3, IRQ_STACK_SIZE              
    MOV     a4, ARM_MODE_IRQ                
    MSR     CPSR_cxsf, a4                   
    ADD     a2, a2, a3                      
    BIC     a2, a2, 3                       
    SUB     a2, a2, 4                       
    MOV     sp, a2                          
    MOV     a4, ARM_MODE_SVC                
    MSR     CPSR_cxsf, a4                   
    ADD     a1, a2, 4                       

    

    LDR     a2, TIMER_STACK                 
    LDR     a4, TIMER_STACK_SIZE            
    LDR     a3, TIM_STACK_SIZE              
    STR     a1, [a2]                        
    STR     a3, [a4]                        
    ADD     a1, a1, a3                      
    LDR     a2, TIMER_PRIORITY              
    MOV     a3, 0                           
    STR     a3, [a2]                        

    
    
    LDR     a3, UNUSED_MEMORY               
    STR     a1, [a3]                        

    
    LDR     a3,=TC0_SOURCE_VECTOR           
    LDR     a2, TIMER_HANDLER               
    STR     a2, [a3]                        
    LDR     a3,=TC0_SOURCE_MODE             
    LDR     a2,=TX_TC0_IRQ_MODE             
    STR     a2, [a3]                        
    LDR     a3,=AIC_BASE                    
    LDR     a2,=TC0_IRQEN_BIT               
    STR     a2, [a3, 0x120]             
    LDR     a3,=TC0_BASE                    
    LDR     a2,=TX_TC0_MODE                 
    STR     a2, [a3, 0x4]               
    LDR     a3,=TC0_BASE                    
    LDR     a2,=TC0_IRQEN_BIT               
    STR     a2, [a3, 0x24]               
    LDR     a3,=TC0_BASE                    
    LDR     a2, [a3, 0x20]                
    LDR     a3,=TC0_BASE                    
    MOV     a2, 0                           
    STR     a2, [a3, 0x28]               
    LDR     a3,=TC0_BASE                    
    LDR     a2,=TC0_IRQEN_BIT               
    STR     a2, [a3, 0x2c]               
    LDR     a3,=TC0_BASE                    
    MOV     a2, 0                           
    STR     a2, [a3, 0x10]                
    LDR     a3,=TC0_BASE                    
    LDR     a2,=TX_TICK_RATE                
    STR     a2, [a3, 0x1c]                
    LDR     a3,=TC0_BASE                    
    LDR     a2,=TC_CLKEN                    
    STR     a2, [a3, 0x0]               
    LDR     a2,=TC_SWTRG                    
    STR     a2, [a3]                        

    
    RET                                     

    .type _tx_initialize_low_level,$function
    .size _tx_initialize_low_level,.-_tx_initialize_low_level






















    .globl  __tx_timer_handler
__tx_timer_handler:
    STMDB   sp!, {a1-a4}                    

    
    MRS     a1, SPSR                        
    SUB     lr, lr, 4                       
    STMDB   sp!, {a1, sl, ip, lr}           
    BL      _tx_thread_context_save

    LDR     a2,=AIC_BASE                    
    MOV     a3, TC0_IRQEN_BIT               
    STR     a3, [a2, 0x130]            
    LDR     a2,=TC0_BASE                    
    LDR     a3, [a2, 0x20]                
    BL      _tx_timer_interrupt             

    
    B       _tx_thread_context_restore

    .type __tx_timer_handler,$function
    .size __tx_timer_handler,.-__tx_timer_handler



     .globl  __at91_usart0_handler
__at91_usart0_handler:
    STMDB   sp!, {a1-a4}                    
    MRS     a1, SPSR                        
    SUB     lr, lr, 4                       
    STMDB   sp!, {a1, sl, ip, lr}           
    BL      _tx_thread_context_save

    LDR     a2,=AIC_BASE                    
    STR     a2, [a2, 0x130]            
    ldr     r0, =terminal_1		    
    bl      terminal_c_handler	    	    

    
    B       _tx_thread_context_restore

   .type __at91_usart0_handler,$function
   .size __at91_usart0_handler,.-__at91_usart0_handler



    .globl  __at91_irq0_handler
__at91_irq0_handler:
    STMDB   sp!, {a1-a4}                    
    MRS     a1, SPSR                        
    SUB     lr, lr, 4                       
    STMDB   sp!, {a1, sl, ip, lr}           
    BL      _tx_thread_context_save

    LDR     a2,=AIC_BASE                    
    STR     a2, [a2, 0x130]            
    bl      irq0_c_handler		    

    
    B       _tx_thread_context_restore

   .type __at91_irq0_handler,$function
   .size __at91_irq0_handler,.-__at91_irq0_handler



    .globl  __tx_undefined
__tx_undefined:
    B       __tx_undefined                  

    .type __tx_undefined,$function
    .size __tx_undefined,.-__tx_undefined

    .globl  __tx_swi_interrupt
__tx_swi_interrupt:
    B       __tx_swi_interrupt              

    .type __tx_swi_interrupt,$function
    .size __tx_swi_interrupt,.-__tx_swi_interrupt

    .globl  __tx_prefetch_handler
__tx_prefetch_handler:
    B       __tx_prefetch_handler           

    .type __tx_prefetch_handler,$function
    .size __tx_prefetch_handler,.-__tx_prefetch_handler

    .globl  __tx_abort_handler
__tx_abort_handler:
    B       __tx_abort_handler              

    .type __tx_abort_handler,$function
    .size __tx_abort_handler,.-__tx_abort_handler

    .globl  __tx_reserved_handler
__tx_reserved_handler:
    B       __tx_reserved_handler           

    .type __tx_reserved_handler,$function
    .size __tx_reserved_handler,.-__tx_reserved_handler

   .globl  __tx_fiq_handler
__tx_fiq_handler:
    B       __tx_fiq_handler                

    .type __tx_fiq_handler,$function
    .size __tx_fiq_handler,.-__tx_fiq_handler


SYS_STACK_PTR:
    .data.w _tx_thread_system_stack_ptr
FIQ_STACK_SIZE:
    .data.w 512                             
IRQ_STACK_SIZE:
    .data.w 1024                            
TIM_STACK_SIZE:
    .data.w 1024                            
UNUSED_MEMORY:
    .data.w _tx_initialize_unused_memory
TIMER_STACK:
    .data.w _tx_timer_stack_start
TIMER_STACK_SIZE:
    .data.w _tx_timer_stack_size
TIMER_PRIORITY:
    .data.w _tx_timer_priority
FREE_MEMORY:
    .data.w __ghsbegin_free_mem
TIMER_HANDLER:
    .data.w __tx_timer_handler