test_mec01.c

ARM入门的好帮手.包含了从简单到相对较复杂的程序.

//*-----------------------------------------------------------------------------
//*      ATMEL Microcontroller Software Support  -  ROUSSET  -
//*-----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name               : test_mec01.c
//* Object                  : Test software for Memory Extention Board
//* Translator              : ARM Software Development Toolkit V2.5
//*							: Green Hills Multi2K
//*							: ARM ADS 1.1
//*
//* 1.0 06/05/00  PFi       : Creation
//* 1.1 12/09/00  PFi       : Add definition for AT49BV8011/8011T
//* 1.2 10/10/00  PFi    	: Add CSR7 Configuration for simulating A20 on EB55
//* 1.3 01/16/01  SC		: Conditionnal compilation added
//*-----------------------------------------------------------------------------

/* Include Standard c Libraries to allow stand alone compiling and operation */
#include <stdio.h>
#include <stdlib.h>

#define		SOFTWARE_VERSION	"V2.1"			/* Corresponds to v1.3 defined above */


#define TRUE    1
#define FALSE   0
#define u_int   unsigned int

typedef volatile unsigned short flash_word ;

/* Timeout loop count for EB40, EB42, EB55 and EB63 */
#ifdef AT91R40008
#define TIME_OUT            60000000
#else
#define TIME_OUT            6000000
#endif

/***************************************************************/
/*         SRAM Memory address, size and features definition   */
/***************************************************************/
#define sram_base_addr      0x05000000
#define sram_size           (2*1024*1024)



/****************************************************************/
/*         FLASH Memory address, size and features definition   */
/****************************************************************/
#define flash1_base_addr      0x03000000
#define flash2_base_addr      0x04000000

#define FLASH_SEQ_ADD1      (0x5555)
#define FLASH_SEQ_ADD2      (0x2AAA)

#define FLASH_CODE1         ((flash_word)(0xAA))
#define FLASH_CODE2         ((flash_word)(0x55))
#define ID_IN_CODE          ((flash_word)(0x90))
#define ID_OUT_CODE         ((flash_word)(0xF0))
#define WRITE_CODE          ((flash_word)(0xA0))
#define ERASE_CHIP_CODE1    ((flash_word)(0x80))
#define ERASE_CHIP_CODE2    ((flash_word)(0x10))


/* Configuration of EBI to support FLASH & SRAM memories */
#define ALE                 ((u_int)(0x6))
/* EB40A: Special settings for a frequency clock @66MHz  */
#ifdef AT91R40008
#define CONF_CSR2           ((u_int)(0x0300253d)) //* First Flash device
#define CONF_CSR3           ((u_int)(0x0400253d)) //* Second Flash device
#define CONF_CSR4           ((u_int)(0x05002425)) //* Fisrt Memory Bank
#define CONF_CSR5           ((u_int)(0x05102425)) //* Second Memory Bank
#define CONF_CSR7           ((u_int)(0x03102429))
#else
/* General settings for other board  */
#define CONF_CSR2           ((u_int)(0x03002529)) //* First Flash device
#define CONF_CSR3           ((u_int)(0x04002529)) //* Second Flash device
#define CONF_CSR4           ((u_int)(0x05002021)) //* Fisrt Memory Bank
#define CONF_CSR5           ((u_int)(0x05102021)) //* Second Memory Bank
#define CONF_CSR7           ((u_int)(0x03102429))
#endif


/* Defines organization structure */
typedef struct OrgDef
{
    unsigned int    sector_number ;
    unsigned int    sector_size ;
} OrgDef ;

/* Defines supported flash organizations */
const OrgDef OrgAT49BV16x4[] =
{
    /* 8 x 8kbytes sectors */
    {
        8,
        8*1024
    },
    /* 2 x 32 kbytes sectors */
    {
        2,
        32*1024
    },
    /* 30 x 64 kbytes sectors */
    {
        30,
        64*1024
    }
};

const OrgDef OrgAT49BV16x4T[] =
{
    /* 30 x 64 kbytes sectors */
    {
        30,
        64*1024
    },
    /* 2 x 32 kbytes sectors */
    {
        2,
        32*1024
    },
    /* 8 x 8kbytes sectors */
    {
        8,
        8*1024
    }
};

const OrgDef OrgAT49BV8011[] =
{
    /* 1 x 16 kbytes sector */
    {
        1,
        16*1024
    },
    /* 1 x 32 kbytes sectors */
    {
        1,
        32*1024
    },
    /* 4 x 8kbytes sectors */
    {
        4,
        8*1024
    },
    /* 1 x 32bytes sectors */
    {
        1,
        32*1024
    },
    /* 1 x 16 kbytes sector */
    {
        1,
        16*1024
    },
    /* 14 x 64 kbytes sector */
    {
        14,
        64*1024
    }
};

const OrgDef OrgAT49BV8011T[] =
{
    /* 14 x 64 kbytes sector */
    {
        14,
        64*1024
    },
    /* 1 x 16 kbytes sector */
    {
        1,
        16*1024
    },
    /* 1 x 32bytes sectors */
    {
        1,
        32*1024
    },
    /* 4 x 8kbytes sectors */
    {
        4,
        8*1024
    },
    /* 1 x 32 kbytes sectors */
    {
        1,
        32*1024
    },
    /* 1 x 16 kbytes sector */
    {
        1,
        16*1024
    }
};

/* Defines Flash device definition structure */
typedef struct FlashDef
{
    unsigned int    flash_size;
    char            *flash_name;
    unsigned int    flash_manuf_id;
    unsigned int    flash_id;
    unsigned int    flash_mask;
    const OrgDef    *flash_org;
    unsigned int    flash_block_nb;
}FlashDef;

/* Define supported flash Table */
const FlashDef FlashTable[] =
{
    {
        2*1024*1024,
        "AT49BV16x4",
        0x001F,
        0x00C0,
        0x001FFFFF,
        OrgAT49BV16x4,
        sizeof(OrgAT49BV16x4)/sizeof(OrgDef)
    },
    {
        2*1024*1024,
        "AT49BV16x4T",
        0x001F,
        0x00C2,
        0x001FFFFF,
        OrgAT49BV16x4T,
        sizeof(OrgAT49BV16x4T)/sizeof(OrgDef)
    },
    {
        1024*1024,
        "AT49BV8011",
        0x001F,
        0x00CB,
        0x00FFFFF,
        OrgAT49BV8011,
        sizeof(OrgAT49BV8011)/sizeof(OrgDef)
    },
    {
        1024*1024,
        "AT49BV8011T",
        0x001F,
        0x004A,
        0x00FFFFF,
        OrgAT49BV8011T,
        sizeof(OrgAT49BV8011T)/sizeof(OrgDef)
    }
};

/* Defines number of flash supported */
#define NB_FLASH_SUPPORTED  sizeof(FlashTable)/sizeof(FlashDef)


/*------------------------------------------------------*/
const FlashDef *flash_identify ( flash_word *base_addr )
/*------------------------------------------------------*/
//* Begin
{
    flash_word      manuf_code ;
    flash_word      device_code ;
    const FlashDef  *flash_pt ;
    int             exit = FALSE ;

    //* Initialize Flash Table pointer
    flash_pt = FlashTable ;

    //* Look for the  device in the known flash table
    while ( exit == FALSE )
    {
        //* Display Flash Identification Header
        printf ( "\nTrying to identify Flash at base address (0x%x)\n", (int)base_addr) ;

        //* Display Flash Tested
        printf ( "Trying %s\n", flash_pt->flash_name ) ;

        //* Enter Software Product Identification Mode
        *(base_addr + FLASH_SEQ_ADD1) = FLASH_CODE1;
        *(base_addr + FLASH_SEQ_ADD2) = FLASH_CODE2;
        *(base_addr + FLASH_SEQ_ADD1) = ID_IN_CODE;

        //* Read Manufacturer and device code from the device
        manuf_code  = *base_addr ;
        device_code = *(base_addr + 1) ;

        //* Exit Software Product Identification Mode
        *(base_addr + FLASH_SEQ_ADD1) = FLASH_CODE1;