dk3200_3.frp

增强型单片机UPSD33XX系列芯片做音频发生器例程。内含KEIL源码和PLD源码。

******************************************************************************************
                               PSDsoft Express Version 8.01
                                   Output of PSD Fitter
******************************************************************************************
  PROJECT    : dk3200_3                         DATE : 04/09/2004
  DEVICE     : uPSD3254A                        TIME : 23:48:20
  FIT OPTION : Keep Current
  DESCRIPTION: uPSD Sound Studio Demo
 
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     ==== Pin Layout for T (52-Pin TQFP) Package Type ====

                                               -----------------------------
                                              |                             |
                                           DE |1 ] pd1              p3_4 [27|  
                                          DRS |2 ] pc7              p3_5 [28|  
                                     tdo, TDO |3 ] pc6/TDO          p3_6 [29|  
                                     tdi, TDI |4 ] pc5/TDI          p3_7 [30|  
                                    USB_minus |5 ] USBm            Xtal1 [31| Xtal1
                                    USB_DCOnD |6 ] pc4/TERR        Xtal2 [32| Xtal2
                                     USB_plus |7 ] USBp              VCC [33|  
                                              |8 ] VCC              p1_0 [34|  
                                              |9 ] GND              p1_1 [35|  
                                      DRD_WRn |10] pc3/TSTAT        p1_2 [36|  
                                        vstby |11] pc2              p1_3 [37|  
                                     tck, TCK |12] pc1/TCK          p1_4 [38|  
                                     tms, TMS |13] pc0/TMS          p1_5 [39|  
                                         p4_7 |14] p4_7             p1_6 [40|  
                                              |15] p4_6             p1_7 [41|  
                                              |16] p4_5              pb7 [42| LCD_D7
                                         PWM1 |17] p4_4              pb6 [43| LCD_D6
                                         PWM0 |18] p4_3         Reset_In [44| Reset_In
                                              |19] GND               GND [45|  
                                              |20] p4_2             Vref [46| VREF
                                              |21] p4_1              pb5 [47| LCD_D5
                                              |22] p4_0              pb4 [48| LCD_D4
                                              |23] p3_0              pb3 [49| LCD_D3
                                              |24] p3_1              pb2 [50| LCD_D2
                                              |25] p3_2              pb1 [51| LCD_D1
                                              |26] p3_3              pb0 [52| LCD_D0
                                              |                             |
                                               -----------------------------
     ==== Global Configuration ====

Control Signals                                                  : /WR, /RD, /PSEN
Main PSD flash memory will reside in this space at power-up      : Both Program and Data space
Secondary PSD flash memory will reside in this space at power-up : Program space
Standby Voltage Input (PC2)                                      : ON
Standby-on Indicator (PC4)                                       : OFF
RDY/Busy function (PC3)                                          : OFF
Load Micro-Cell on                                               : edge
Security Protection                                              : OFF 

     ==== DataBus_IMC access information ====

                  CSIOP
Location     Address Offset     Register Name           Signals
--------------------------------------------------------

     ===== Resource Usage Summary =====

Total Product Terms Used:  12

Device Resources                    used / total
------------------------------------------------
Internal nodes:
   Combinatorial Outputs        :    0 
   Registered Outputs           :    0 
Other Information
   Microcells                   :    0   /  8 
     Micro-Cells AB :
      Buried Microcells         :    0 
      Output Microcells         :    0 
   Product Terms                :    0   /  24
   Control Product Terms        :    0   /  34

Port B: (pins 52 51 50 49 48 47 43 42)
I/O Pins :                           8   /  8 
   GP I/O or Address Out        :    8 
   Logic Inputs                 :    0 
   Address Latch Inputs         :    0 
   PT Dependent Latch Inputs    :    0 
   PT Dependent Register Inputs :    0 
   Combinatorial Outputs        :    0 
   Registered Outputs           :    0 
Other Information
   Microcells                   :    0   /  8 
     Micro-Cells AB :
      Buried Microcells         :    0 
      Output Microcells         :    0 
     Micro-Cells BC :
      Buried Microcells         :    0 
      Output Microcells         :    0 
   Product Terms                :    0   /  24
   Control Product Terms        :    0   /  34

Port C: (pins 13 12 11 10 6 4 3 2)
I/O Pins :                           8   /  8 
   GP I/O or Address Out        :    3 
   Logic Inputs                 :    0 
   Address Latch Inputs         :    0 
   PT Dependent Latch Inputs    :    0 
   PT Dependent Register Inputs :    0 
   JTAG signals                 :    4 
   Standby Voltage Input        :    1 
   Rdy/Bsy signal               :    0 
   Standby On Indicator         :    0 
   Combinatorial Outputs        :    0 
   Registered Outputs           :    0 
Other Information
   Microcells                   :    0   /  8 
     Micro-Cells BC :
      Buried Microcells         :    0 
      Output Microcells         :    0 
   Product Terms                :    0   /  32
   Control Product Terms        :    0   /  34

Port D: (pins 1)
I/O Pins :                           1   /  1 
   GP I/O or Address Out        :    1 
   Logic Inputs                 :    0 
   Clock Input                  :    0 
   Fast Decoding Outputs        :    0 
Other Information
   Product Terms                :    0   /  1 
   Control Product Terms        :    0   /  1 


     ==== OMC Resource Assignment ====

  Resources           PT             User
  Used                Allocation     Name
 ---------------------------------------------------------
Micro-Cell AB :

Micro-Cell BC :

External Chip Select :


     ========= Equations =========

DPLD          EQUATIONS :
=======================
     fs0 = !pdn & !pgr2 & !pgr1 & !pgr0 & a15;

     fs1 = !pdn & !pgr2 & !pgr1 & pgr0 & a15;

     fs2 = !pdn & !pgr2 & pgr1 & !pgr0 & a15;

     fs3 = !pdn & !pgr2 & pgr1 & pgr0 & a15;

     fs4 = !pdn & pgr2 & !pgr1 & !pgr0 & a15;

     fs5 = !pdn & pgr2 & !pgr1 & pgr0 & a15;

     fs6 = !pdn & pgr2 & pgr1 & !pgr0 & a15;

     fs7 = !pdn & pgr2 & pgr1 & pgr0 & a15;

     csboot0 = !pdn & !a15 & !a14 & !a13;

     csiop = !pdn & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & a9 & !a8;

     rs0 = (!pdn & !a15 & !a14 & a13)
          # (!pdn & !a15 & a14 & !a13);

INTERNAL NODE EQUATIONS :
=======================
PORTB         EQUATIONS :
=======================
PORTC         EQUATIONS :
=======================
PORTD         EQUATIONS :
=======================
                                      ---  End  ---