📄 dspjpeg.asm
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[ A1] SUB .D1 A0,1,A0 ; |469|
[ A1] STH .D2T1 A0,*+SP(4) ; |469|
.line 9
[!A1] STH .D2T1 A4,*+SP(4) ; |465|
.line 17
ADD .S1X 4,SP,A0 ; |473|
[ B0] LDH .D1T2 *+A0(2),B4 ; |473|
[ B0] LDH .D1T1 *A0,A0 ; |473|
NOP 4
[ B0] STH .D2T1 A0,*B0 ; |473|
[ B0] STH .D2T2 B4,*+B0(2) ; |473|
.line 18
RET .S2 B3 ; |474|
ADD .D2 8,SP,SP ; |474|
NOP 4
; BRANCH OCCURS ; |474|
.endfunc 474,000000000h,8
.sect ".text"
.global _ProcessDU
.sym _ProcessDU,_ProcessDU, 32, 2, 0
.func 204
;******************************************************************************
;* FUNCTION NAME: _ProcessDU *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,B0,B1,B2, *
;* B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,SP *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,B0,B1,B2, *
;* B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,DP,SP *
;* Local Frame Size : 0 Args + 396 Auto + 32 Save = 428 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_ProcessDU:
;** --------------------------------------------------------------------------*
.line 2
.sym _lpBuf,4, 19, 17, 32
.sym _quantTab,20, 30, 17, 32
.sym _dcHuffTab,6, 24, 17, 32, _tagHUFFCODE
.sym _acHuffTab,22, 24, 17, 32, _tagHUFFCODE
.sym _DC,8, 19, 17, 32
.sym _DC,27, 19, 4, 32
.sym _acHuffTab,12, 24, 4, 32, _tagHUFFCODE
.sym _dcHuffTab,26, 24, 4, 32, _tagHUFFCODE
.sym _quantTab,10, 30, 4, 32
.sym _lpBuf,11, 19, 4, 32
.sym _i,21, 4, 4, 32
.sym _EndBit,2, 4, 4, 32
.sym _diffVal,18, 3, 4, 16
.sym _acLen,4, 12, 1, 8
.sym _sigBuf,16, 51, 1, 1024,, 64
.sym _acSym,144, 56, 1, 2048, _tagACSYM, 64
ADDK .S2 -432,SP ; |205|
|| MV .S1X SP,A9 ; |205|
STW .D2T2 B13,*+SP(432)
STW .D2T2 B12,*+SP(428)
STW .D2T2 B11,*+SP(424)
|| STW .D1T1 A11,*-A9(24)
STW .D2T2 B10,*+SP(420)
|| STW .D1T1 A10,*-A9(28)
STW .D1T1 A12,*-A9(20)
|| STW .D2T2 B3,*+SP(416)
MV .S2X A8,B11 ; |205|
|| MV .S1X B4,A10 ; |205|
MV .D1 A4,A11 ; |205|
|| MV .S2X A6,B10 ; |205|
|| MV .S1X B6,A12 ; |205|
.line 8
ZERO .D2 B4 ; |211|
STB .D2T2 B4,*+SP(4) ; |211|
.line 13
CALL .S1 _fdct_8x8 ; |216|
MVK .S2 0x1,B4 ; |216|
MVKL .S2 RL2,B3 ; |216|
MVKH .S2 RL2,B3 ; |216|
NOP 2
RL2: ; CALL OCCURS ; |216|
MV .S2X A10,B12
.line 15
MVK .S1 (_FZBT-$bss),A0
MVK .S1 0x40,A0 ; |218|
|| ADD .S2X DP,A0,B13
MV .D1 A0,A10
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;* Disqualified loop: Loop contains a call
;*----------------------------------------------------------------------------*
L11:
.line 18
CALL .S1 __divu ; |221|
|| LDH .D1T1 *A11++,A0 ; |221|
LDW .D2T2 *B12++,B4 ; |221|
MVKL .S2 RL8,B3 ; |221|
MVKH .S2 RL8,B3 ; |221|
NOP 1
ADD .D1 A0,A0,A4 ; |221|
RL8: ; CALL OCCURS ; |221|
CALL .S1 __fltud ; |221|
MVKL .S2 RL9,B3 ; |221|
MVKH .S2 RL9,B3 ; |221|
NOP 3
RL9: ; CALL OCCURS ; |221|
CALL .S1 __addd ; |221|
MVKL .S2 RL10,B3 ; |221|
ZERO .D2 B5 ; |221|
MVKH .S2 0x3fe00000,B5 ; |221|
MVKH .S2 RL10,B3 ; |221|
ZERO .D2 B4 ; |221|
RL10: ; CALL OCCURS ; |221|
CALL .S1 __fixdi ; |221|
MVKL .S2 RL11,B3 ; |221|
MVKH .S2 RL11,B3 ; |221|
NOP 3
RL11: ; CALL OCCURS ; |221|
LDW .D2T2 *B13++,B4 ; |221|
ADD .D2 SP,16,B5 ; |221|
NOP 3
STH .D2T1 A4,*+B5[B4] ; |221|
.line 19
SUB .D1 A10,1,A1 ; |222|
[ A1] B .S1 L11 ; |222|
SUB .D1 A10,1,A10 ; |222|
NOP 4
; BRANCH OCCURS ; |222|
;** --------------------------------------------------------------------------*
.line 25
LDH .D2T2 *B11,B5 ; |228|
LDH .D2T2 *+SP(16),B4 ; |228|
NOP 4
SUB .D2 B4,B5,B5 ; |228|
EXT .S2 B5,16,16,B2 ; |228|
.line 26
STH .D2T2 B4,*B11 ; |229|
.line 28
[ B2] B .S1 L12 ; |231|
NOP 5
; BRANCH OCCURS ; |231|
;** --------------------------------------------------------------------------*
CALL .S1 _WriteBitsStream ; |380|
|| LDBU .D2T2 *+B10(2),B4 ; |380|
LDHU .D2T1 *B10,A4 ; |380|
MVKL .S2 RL12,B3 ; |380|
MVKH .S2 RL12,B3 ; |380|
NOP 2
RL12: ; CALL OCCURS ; |380|
.line 31
B .S1 L13 ; |234|
ADD .D2 SP,16,B4
NOP 4
; BRANCH OCCURS ; |234|
;** --------------------------------------------------------------------------*
L12:
LDW .D2T2 *+DP(_pVLITAB),B4 ; |380|
MVKL .S2 RL13,B3 ; |380|
MVKH .S2 RL13,B3 ; |380|
NOP 2
LDBU .D2T2 *+B4[B2],B4 ; |380|
NOP 4
MPYSU .M2 6,B4,B4 ; |380|
NOP 1
ADD .D2 B10,B4,B5 ; |380|
LDHU .D2T1 *B5,A4 ; |380|
|| CALL .S1 _WriteBitsStream ; |380|
LDBU .D2T2 *+B5(2),B4 ; |380|
NOP 4
RL13: ; CALL OCCURS ; |380|
.line 35
CALL .S1 _BuildSym2 ; |238|
MV .S1X B2,A4 ; |238|
MVKL .S2 RL14,B3 ; |238|
ADD .S1X 10,SP,A3 ; |238|
MVKH .S2 RL14,B3 ; |238|
NOP 1
RL14: ; CALL OCCURS ; |238|
CALL .S1 _WriteBitsStream ; |386|
|| LDBU .D2T2 *+SP(12),B4 ; |386|
LDHU .D2T1 *+SP(10),A4 ; |386|
MVKL .S2 RL15,B3 ; |386|
MVKH .S2 RL15,B3 ; |386|
NOP 2
RL15: ; CALL OCCURS ; |386|
ADD .D2 SP,16,B4
;** --------------------------------------------------------------------------*
L13:
.line 39
MVK .S2 0x3f,B6 ; |242|
.line 6
ZERO .D1 A2 ; |209|
.line 39
MVK .S2 0x1,B7 ; |242|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 242
;* Loop opening brace source line : 243
;* Loop closing brace source line : 246
;* Known Minimum Trip Count : 63
;* Known Maximum Trip Count : 63
;* Known Max Trip Count Factor : 63
;* Loop Carried Dependency Bound(^) : 1
;* Unpartitioned Resource Bound : 1
;* Partitioned Resource Bound(*) : 1
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 1* 0
;* .D units 0 1*
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 0 1*
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 2 2 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1* 0
;* Bound(.L .S .D .LS .LSD) 1* 1*
;*
;* Searching for software pipeline schedule at ...
;* ii = 1 Schedule found with 7 iterations in parallel
;* Done
;*
;* Epilog not entirely removed
;* Collapsed epilog stages : 1
;*
;* Prolog not removed
;* Collapsed prolog stages : 0
;*
;* Minimum required memory pad : 0 bytes
;*
;* For further improvement on this loop, try option -mh5
;*
;* Minimum safe trip count : 6
;*----------------------------------------------------------------------------*
L14: ; PIPED LOOP PROLOG
ADD .S2 1,B7,B5 ; |246| (P) <0,1> ^ Define a twin register
|| B .S1 L15 ; |246| (P) <0,1>
|| LDH .D2T2 *+B4[B7],B0 ; (P) <0,1> ^
ADD .S2 1,B5,B5 ; |246| (P) <1,1> ^ Define a twin register
|| LDH .D2T2 *+B4[B5],B0 ; (P) <1,1> ^
|| B .S1 L15 ; |246| (P) <1,1>
ADD .S2 1,B5,B5 ; |246| (P) <2,1> ^ Define a twin register
|| B .S1 L15 ; |246| (P) <2,1>
|| LDH .D2T2 *+B4[B5],B0 ; (P) <2,1> ^
ADD .S2 1,B5,B5 ; |246| (P) <3,1> ^ Define a twin register
|| LDH .D2T2 *+B4[B5],B0 ; (P) <3,1> ^
|| B .S1 L15 ; |246| (P) <3,1>
MV .D1 A2,A3
|| SUB .S2 B6,11,B1
|| MV .L1X B7,A0
|| ADD .L2 1,B5,B5 ; |246| (P) <4,1> ^ Define a twin register
|| B .S1 L15 ; |246| (P) <4,1>
|| LDH .D2T2 *+B4[B5],B0 ; (P) <4,1> ^
;** --------------------------------------------------------------------------*
L15: ; PIPED LOOP KERNEL
ADD .D1 1,A0,A0 ; |246| <0,6> ^
|| [ B0] MV .L1 A0,A3 ; |245| <0,6> ^
|| ADD .S2 1,B5,B5 ; |246| <5,1> ^ Define a twin register
|| LDH .D2T2 *+B4[B5],B0 ; <5,1> ^
|| [ B1] B .S1 L15 ; |246| <5,1>
|| [ B1] SUB .L2 B1,1,B1 ; |246| <6,0>
;** --------------------------------------------------------------------------*
L16: ; PIPED LOOP EPILOG
[ B0] MV .D1 A0,A3 ; |245| (E) <2,6> ^
|| ADD .S1 1,A0,A0 ; |246| (E) <2,6> ^
ADD .D1 1,A0,A0 ; |246| (E) <3,6> ^
|| [ B0] MV .S1 A0,A3 ; |245| (E) <3,6> ^
[ B0] MV .D1 A0,A3 ; |245| (E) <4,6> ^
|| ADD .S1 1,A0,A0 ; |246| (E) <4,6> ^
ADD .D1 1,A0,A0 ; |246| (E) <5,6> ^
|| [ B0] MV .S1 A0,A3 ; |245| (E) <5,6> ^
;** --------------------------------------------------------------------------*
[ B0] MV .D1⌨️ 快捷键说明
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