📄 sdram
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/* =============================================================================
*
* Description: This is a C implementation for Thread BootThread
*
* -----------------------------------------------------------------------------
* Comments:
*
* ===========================================================================*/
/* Get access to any of the VDK features & datatypes used */
#include "BootThread.h"
#include <cdefBF532.h>
// Memory DMA source data is SDRAM
// fill this memory with some known data during start.
//
int dma_dst_data[256];
// Initialize SDRAM with default values
// SCLK = 133MHz
// Bank-0 Enabled size 32 MB
//
static void Init_SDRAM()
{
// check if SDRAM is already configured.
//
if(!(*pEBIU_SDSTAT & 0x8)) return;
*pEBIU_SDGCTL = 0x0091998D;
*pEBIU_SDBCTL = 0x13;
*pEBIU_SDRRC = 0x1A0;
ssync();
}
static void Populate_SDRAM(unsigned int addr, int size)
{
int i=0;
unsigned int pattern = 0x1;
volatile unsigned int *pAddr = (unsigned int volatile*)addr;
for(i=0;i< size; i++)
*pAddr++ = pattern++;
}
void
BootThread_RunFunction(void **inPtr)
{
int i;
// Initialize SDRAM
//
Init_SDRAM();
// Fill values with 0xDEADBEEF from 0x000000 up to 100 integer locations
//
Populate_SDRAM(0x00000000,10);
// Initilize the destiation size
//
memset(dma_dst_data,0,sizeof(int)*256);
printf("Before DMA transfer the values are:\n");
for(i=0; i< 10; i++)
printf("%d ",dma_dst_data[i]);
printf("\n");
//
// DMA source stream configuration. MDMA_S0_xxx
// Setting up source start address, Count and Modify.
//
// In the below example we were asking to transfer 10, 32 bit
// values from the SDRAMs source location to the destination.
//
*pMDMA_S0_START_ADDR = 0x0; // SDRAM start address
*pMDMA_S0_X_COUNT = 10; // Number of elements to transfer
*pMDMA_S0_X_MODIFY = 4; // 4 byte increment (one int each time)
*pMDMA_S0_Y_MODIFY = 0; // 1D transfer so its 0
*pMDMA_S0_Y_COUNT = 0; // 1D transfer so its 0
//
// DMA destination configuration. It has to be same as the
// Source stream exept the start address.
//
*pMDMA_D0_START_ADDR = dma_dst_data;
*pMDMA_D0_X_COUNT = 10; // Number of elements to transfer
*pMDMA_D0_X_MODIFY = 4; // 4 byte increment (one int each time)
*pMDMA_D0_Y_MODIFY = 0; // 1D transfer so its 0
*pMDMA_D0_Y_COUNT = 0; // 1D transfer so its 0
//
// Configuring the Source Stream. Source stream configuration
// register. Always configure the Source Stream first. As soon
// as destination stream configure register's DMA bit is enabled
// DMA transfer starts. By default the source stream is memory read.
//
*pMDMA_S0_CONFIG = 1 << 0; // Enable DMA
*pMDMA_S0_CONFIG |= 1 << 3; // Enable 32 bit DMA
ssync();
//
// Configure the Destination Stream. Destination Stream has to be configureed
// as memory write. Confiure to transfer 16 bit words.We want an interrupt
// after DMA is completed. At the end Enable DMA. As soon as the bit 0 is enabled
// in the Destination configure register DMA transfer starts.
//
*pMDMA_D0_CONFIG = 1 << 7; // Enable interrupts
*pMDMA_D0_CONFIG |= 1 << 3; // Enable 32 bit DMA
*pMDMA_D0_CONFIG |= 1 << 1; // DMA Memory Write
*pMDMA_D0_CONFIG |= 1 << 0; // Enable DMA
idle();
// Acknowledge the DMA interrupt. The status bit is set.
//
*pMDMA_D0_IRQ_STATUS = 0x1;
// Signal the DMA thread to read the values and print
//
VDK_PostSemaphore(kdmaComplete);
}
int
BootThread_ErrorFunction(void **inPtr)
{
/* TODO - Put this thread's error handling code HERE */
/* The default ErrorHandler kills the thread */
VDK_DestroyThread(VDK_GetThreadID(), false);
return 0;
}
void
BootThread_InitFunction(void **inPtr, VDK_ThreadCreationBlock *pTCB)
{
/* Put code to be executed when this thread has just been created HERE */
/* This routine does NOT run in new thread's context. Any non-static thread
* initialization should be performed at the beginning of "Run()."
*/
}
void
BootThread_DestroyFunction(void **inPtr)
{
/* Put code to be executed when this thread is destroyed HERE */
/* This routine does NOT run in the thread's context. Any VDK API calls
* should be performed at the end of "Run()."
*/
}
/* ========================================================================== */
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