📄 rmp2cntl.asm
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;===========================================================================
; File Name: rmp2cntl.asm
;
; Module Name: RMP2CNTL
;
; Initialization Routine: RMP2CNTL_INIT
;
; Originator: Digital Control Systems Group
; Texas Instruments
;
; Description: This module implements a ramp up and ramp down function.
; The output variable rmp2_out follows the desired ramp value
; rmp2_desired.
;
; |~~~~~~~~~~~~~~~~~|
; | |
; rmp2_desired o----------- ->| RMP2CNTL |----->o rmp2_out
; | |
; | |
; |_________________|
;
;
;
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 9-15-2000 Release Rev 1.00
;===========================================================================
;(To use this Module, copy this section to main system file)
; .ref RMP2CNTL, RMP2CNTL_INIT ;function call
; .ref rmp2_dly, rmp2_desired ;Inputs
; .ref rmp2_out ;Output
; .ref rmp2_max, rmp2_min
;===========================================================================
;Module definitions for external reference.
.def RMP2CNTL, RMP2CNTL_INIT ;function call
.def rmp2_dly,rmp2_desired ;Inputs
.def rmp2_out ;Output
.def rmp2_max, rmp2_min
;===========================================================================
.include x24x_app.h
;===========================================================================
;Variable Definitions for rmp2cntl module
;---------------------------------------------------------------------------
;rmp2_max .usect "rmp2cntl",1 ;Max ramp output
;rmp2_min .usect "rmp2cntl",1 ;Min ramp output
;rmp2_delay_cntr .usect "rmp2cntl",1 ;Counter for ramp2 delay
;rmp2_dly .usect "rmp2cntl",1 ;Ramp2 delay expressed in number of
;system sampling time period.
;rmp2_desired .usect "rmp2cntl",1 ;Desired ramp input for ramp2
;rmp2_out .usect "rmp2cntl",1 ;Ramp2 output
rmp2_max_vars .usect "rmp2cntl",6,1 ;Max ramp output
rmp2_max .set rmp2_max_vars+0 ;Max ramp output
rmp2_min .set rmp2_max_vars+1 ;Min ramp output
rmp2_delay_cntr .set rmp2_max_vars+2 ;Counter for ramp2 delay
rmp2_dly .set rmp2_max_vars+3 ;Ramp2 delay expressed in number of
;system sampling time period.
rmp2_desired .set rmp2_max_vars+4 ;Desired ramp input for ramp2
rmp2_out .set rmp2_max_vars+5 ;Ramp2 output
;======================================================================
RMP2CNTL_INIT:
;======================================================================
LDP #rmp2_out
SPLK #0h,rmp2_delay_cntr
SPLK #50h, rmp2_dly ;Default ramp2 delay
SPLK #0h, rmp2_out
SPLK #07ff0h, rmp2_max ;Default max ramp2 output
SPLK #0fh, rmp2_min ;Default min ramp2 output
RET
;===========================================================
RMP2CNTL:
;===========================================================
LDP #rmp2_out
LACC rmp2_out
SUB rmp2_desired
BCND done_rmp2,EQ
LACC rmp2_delay_cntr
ADD #1
SACL rmp2_delay_cntr
SUB rmp2_dly
BCND done_rmp2, LT
SPLK #0, rmp2_delay_cntr
chng_rmp2:
LACC rmp2_out
SUB rmp2_desired
BCND inc_rmp2, LT
dec_rmp2 LACC rmp2_out
SUB #1
SACL rmp2_out
SUB rmp2_min
BCND done_rmp2, GEQ
LACC rmp2_min
SACL rmp2_out
B done_rmp2
inc_rmp2 LACC rmp2_out
ADD #1
SACL rmp2_out
SUB rmp2_max
BCND done_rmp2, LEQ
LACC rmp2_max
SACL rmp2_out
done_rmp2:
RET
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