📄 bldc3_1.asm
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;=========================================================================================
; System Name: BLDC3_1
;
; File Name: BLDC3_1.ASM
;
; Description: Implements hall sensor control of BLDC motor
;
; Originator: Digital Control Systems Group
; Texas Instruments
;
; Target Device:F240, F243, F2407
; To Select the target device see x24x_app.h file.
;
;
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 9-15-2000 Release Rev 1.0
;==========================================================================================
;SYSTEM OPTIONS
;******************************************************************************************
real_time .set 1 ;set to 1 for real time mode, otherwise set 0
.include "x24x_app.h"
;-----------------------------------------------------------------------------
; External references
;-----------------------------------------------------------------------------
.global MON_RT_CNFG
.ref SYS_INIT
.ref RMP2CNTL, RMP2CNTL_INIT ;function call
.ref rmp2_dly, rmp2_desired ;Inputs
.ref rmp2_out ;Output
.ref rmp2_max, rmp2_min
.ref MOD6_CNT, MOD6_CNT_INIT ;function call
.ref m6_trig_in, m6_cntr ;Inputs
.ref HALL3_DRV, HALL3_DRV_INIT ;function call
.ref cmtn_trig_hall, hall_map_ptr
.ref BLDC_3PWM_DRV, BLDC_3PWM_DRV_INIT ;function call
.ref cmtn_ptr_bd, D_func, Mfunc_p ;Inputs
.ref DAC_VIEW_DRV,DAC_VIEW_DRV_INIT ; function call
.ref DAC_IPTR0,DAC_IPTR1,DAC_IPTR2,DAC_IPTR3 ; Inputs
.ref DATA_LOG, DATA_LOG_INIT ;function call
.ref dlog_iptr1, dlog_iptr2 ;Inputs
.ref trig_value ;Inputs
;************************************************************
;-----------------------------------------------------------------------------
; Local Variable Declarations
;-----------------------------------------------------------------------------
.if (x243)
;SYSTEM_INT_PERIOD .set 1000 ;50uS sampling period @50nS CPU clock
;SYSTEM_INT_PERIOD .set 700 ;17.5 uS sampling period @25nS CPU clock
;SYSTEM_INT_PERIOD .set 360 ;18 uS sampling period @50nS CPU clock
;SYSTEM_INT_PERIOD .set 450 ;22.5 uS sampling period @50nS CPU clock
SYSTEM_INT_PERIOD .set 500 ;25 uS sampling period @50nS CPU clock
.endif
.if (x2407)
;SYSTEM_INT_PERIOD .set 758 ;25 uS sampling period @33nS CPU clock
SYSTEM_INT_PERIOD .set 1000 ;25 uS sampling period @25nS CPU clock
.endif
.def _c_int0, PHANTOM, T2_PERIOD_ISR
.def GPR0 ;General purpose registers.
.def v_timer
BLDC_vars .usect "BLDChall",3,1
GPR0 .set BLDC_vars+0
v_timer .set BLDC_vars+1
D_func_desired .set BLDC_vars+2
.bss isr_ticker,1
;==============================================================================
; M A I N C O D E - starts here
;==============================================================================
.text
_c_int0:
CALL SYS_INIT
CALL BLDC_3PWM_DRV_INIT
CALL RMP2CNTL_INIT
CALL MOD6_CNT_INIT
CALL HALL3_DRV_INIT
CALL DAC_VIEW_DRV_INIT
CALL DATA_LOG_INIT
;------------------------------------------------------
;System time-base init
;------------------------------------------------------
; Here time base is derived from T2 Underflow Int (i.e. Period)
; in BLDC_PWM_DRV module.
;Initialize period register
POINT_EV
SPLK #SYSTEM_INT_PERIOD, T2PR
;5432109876543210
;||||!!!!||||!!!!
SPLK #1001000001000000b, T2CON ;Asym
;----------------------------------------------------------
; Initialise the Real time monitor
;---Real Time enable---------------
.if (real_time)
CALL MON_RT_CNFG ;For Real-Time
.endif
;----------------------------------------------------------
;----------------------------------------------------------
; System Interrupt Init.
;----------------------------------------------------------
;Event Manager
POINT_EV
; SPLK #0000001000000000b,EVIMRA ;Enable T1 Underflow Int (i.e. Period)
SPLK #0000000000000100b,EVIMRB ;Enable T2 Underflow Int (i.e. Period)
SPLK #0000000000000000b,EVIMRC
; SPLK #0000000000000111b,EVIMRC ;Enable CAP1,2,3 ints
;||||!!!!||||!!!!
;5432109876543210
SPLK #0FFFFh,EVIFRA ; Clear all Group A interrupt flags
SPLK #0FFFFh,EVIFRB ; Clear all Group B interrupt flags
SPLK #0FFFFh,EVIFRC ; Clear all Group C interrupt flags
;C2xx Core
POINT_PG0
;---Real Time enable---------------
.if (real_time)
; SPLK #0000000001000010b,IMR ;En Int lvl 2 & 7 (T1 ISR)
SPLK #0000000001000100b,IMR ;En Int lvl 3 & 7 (T2 ISR)
; SPLK #0000000001001100b,IMR ;En Int lvl 3,4&7 (T2 & CAP ISR)
;5432109876543210
.else
; SPLK #0000000000000010b,IMR ;En Int lvl 2 (T1 ISR)
SPLK #0000000000000100b,IMR ;En Int lvl 3 (T2 ISR)
; SPLK #0000000000001100b,IMR ;En Int lvl 3&4 (T2 & CAP ISR)
;||||!!!!||||!!!!
;5432109876543210
.endif
SPLK #0FFFFh, IFR ;Clear any pending Ints
EINT ;Enable global Ints
;------------------------------------------------------------------------------------------
;Hardware/Board Specific Initialization
;------------------------------------------------------------------------------------------
;Enables PWM signals on DMC1500
.if (x243|x2407) ;target dependancy
POINT_PF2
LACC OCRA
AND #0BFFFh
SACL OCRA ;Select Secondary function IOPB6
LACC PBDATDIR
OR #04000h
SACL PBDATDIR ;Set IOPB6 as output
LACC PBDATDIR
AND #0FFBFh ;Set IOPB6 low, Enable PWM
; OR #00040h ;Set IOPB6 high, Disable PWM
SACL PBDATDIR
.endif
;----------------------------------------------------------
;Other Parameters Initialization
;----------------------------------------------------------
LDP #D_func
SPLK #2000h, D_func ;Defined in BLDC_3PWM_DRV
LDP #BLDC_vars
BLDD #D_func, D_func_desired
SPLK #0,v_timer ;set virtual timer to start at zero.
;----------------------------------------------------------
;Initial parameter passing to modules
;----------------------------------------------------------
LDP #rmp2_out
BLDD #D_func, rmp2_out
;DLOG pointer init
LDP #dlog_iptr1
SPLK #m6_cntr, dlog_iptr1
;---------------------------------------------------------
;======================================================
MAIN: ;Main system background loop
;======================================================
M_1: NOP
B M_1
;======================================================
;-------------------------------------------------------------------------------------------
;T2P Interrupt Service Routine
;-------------------------------------------------------------------------------------------
T2_PERIOD_ISR:
;Context save regs
MAR *,AR1 ;AR1 is stack pointer
MAR *+ ;skip one position
SST #1, *+ ;save ST1
SST #0, *+ ;save ST0
SACH *+ ;save acc high
SACL * ;save acc low
POINT_EV
; SPLK #0FFFFh,EVIFRA ; Clear all Group A interrupt flags (T1 ISR)
SPLK #0FFFFh,EVIFRB ; Clear all Group B interrupt flags (T2 ISR)
;===========================================================================
POINT_B0
; verifying the ISR
LACC isr_ticker
ADD #1
SACL isr_ticker
;----------------------------
;Start main section of ISR
;----------------------------
RUN_MODE
LDP #hall_map_ptr
BLDD #m6_cntr, hall_map_ptr
CALL HALL3_DRV
LDP #m6_trig_in
BLDD #cmtn_trig_hall, m6_trig_in ;On debounced hall signal, trigger commutation
BLDD #hall_map_ptr, m6_cntr ;Current pointer defined by matching current
;position in hall map table.
CALL MOD6_CNT
LDP #cmtn_ptr_bd ;Use updated pointed in BLDC_3PWM_DRV for ACTR values
BLDD #m6_cntr, cmtn_ptr_bd ;from commutation table.
LDP #rmp2_desired ;Ramp up or down to desired PWM duty cycle.
BLDD #D_func_desired, rmp2_desired
CALL RMP2CNTL
LDP #D_func
BLDD #rmp2_out, D_func
CALL BLDC_3PWM_DRV ;Output updated PWM configuration.
;---------------------------------------------------------
;Update Virtual Timer
;--------------------------
updat_v_timer
LDP #v_timer
LACC v_timer ;Inc virtual timer
ADD #1
AND #07FFFh ;Force 15 bit wrap around
SACL v_timer ;Save it
CALL DAC_VIEW_DRV ;Update DAC output. Define function pointers w/parameter address.
CALL DATA_LOG ;Update buffer for CC graph or memory window. Define function
;pointers w/parameter address.
;--------------------------
;End main section of ISR
;--------------------------
;Restore Context
END_ISR:
MAR *, AR1 ;make stack pointer active
LACL *- ;Restore Acc low
ADDH *- ;Restore Acc high
LST #0, *- ;load ST0
LST #1, *- ;load ST1
CLRC INTM
RET
;===========================================================================================
; I S R - PHANTOM
;
; Description: Dummy ISR, used to trap spurious interrupts.
;
;===========================================================================================
PHANTOM CLRC INTM ;Allow RTMON to continue background ints. Normally PHANTOM
B PHANTOM ;occurs from NMI, which at 0x24 branches to PHANTOM. Check
;for common illegal address sources: wrong data page or linker
;section missing from command file.
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