cur_mod.lst

TI公司24X系列DSP控制无刷直流电机

     113                                                    ; ARP=AR2, AR0->FR2, AR2->i_mr, ARP=AR0
     114            ;----------------------------------------------------------------------------------
     115 0017 be0a                  SFR                             ; ACC = spd_cur_mod  (Q14)
     116                                                    ; ARP=AR0 AR0->FR2, AR2->i_mr
     117            ;----------------------------------------------------------------------------------
     118 0018 be0a                  SFR                             ; ACC = spd_cur_mod  (Q13)
     119                                                    ; ARP=AR0 AR0->FR2, AR2->i_mr
     120            ;----------------------------------------------------------------------------------
     121 0019 be0a                  SFR                             ; ACC = spd_cur_mod  (Q12)
     122                                                    ; ARP=AR0 AR0->FR2, AR2->i_mr
     123            ;----------------------------------------------------------------------------------
     124 001a 9080          SACL    *               ; FR2 = n = spd_cur_mod  (Q12)
     125                                    ; ARP=AR0, AR0->FR2, AR2->i_mr
     126            ;----------------------------------------------------------------------------------
     127            ; *** Current Model ***
     128            ;----------------------------------------------------------------------------------
     129 001b 7c02          SBRK    #2              ; ARP=AR0, AR0->FR0, AR2->i_mr 
     130            ;----------------------------------------------------------------------------------
     131 001c 108a                  LACC    *,AR2   ; ACC = FR0 = iSd  (Q12)
     132                                                            ; ARP=AR0, AR0->FR0, AR2->i_mr, ARP=AR2
     133            ;----------------------------------------------------------------------------------
     134 001d 30a8                  SUB             *+,AR0  ; ACC = iSd - i_mr (Q12)
     135                                                            ; ARP=AR2, AR0->FR0, AR2->Kr, ARP=AR0
     136            ;----------------------------------------------------------------------------------
     137 001e 9080                  SACL    *               ; FR0 = tmp = iSd - i_mr (Q12)
     138                                                            ; ARP=AR0, AR0->FR0, AR2->Kr
     139            ;----------------------------------------------------------------------------------
     140 001f 738a          LT              *,AR2   ; TREG = tmp = iSd - i_mr (Q12)
     141                                                    ; ARP=AR0, AR0->FR0, AR2->Kr, ARP=AR2
     142            ;----------------------------------------------------------------------------------
     143 0020 5498                  MPY             *-,AR0  ; PREG = Kr*(iSd - i_mr)  (Q27)
     144                                                    ; ARP=AR2, AR0->FR0, AR2->i_mr, ARP=AR0
     145            ;----------------------------------------------------------------------------------
     146 0021 be03          PAC                             ; ACC = Kr*(iSd - i_mr)  (Q27)
     147                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr
     148            ;----------------------------------------------------------------------------------
     149 0022 9980          SACH    *,1             ; FR0 = tmp = Kr*(iSd - i_mr)  (Q12)
     150                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr
     151            ;----------------------------------------------------------------------------------
     152 0023 108a                  LACC    *,AR2   ; ACC = FR0 = tmp = Kr*(iSd - i_mr)  (Q12)
     153                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr, ARP=AR2
     154            ;----------------------------------------------------------------------------------
     155 0024 2080                  ADD             *               ; ACC = Kr*(iSd - i_mr) + i_mr  (Q12)
     156                                                            ; ARP=AR2, AR0->FR0, AR2->i_mr
     157            ;----------------------------------------------------------------------------------
     158 0025 9080                  SACL    *               ; i_mr = Kr*(iSd - i_mr) + i_mr  (Q12)
     159                                                            ; ARP=AR2, AR0->FR0, AR2->i_mr
     160            ;----------------------------------------------------------------------------------
     161 0026 e308          BCND    I_MRNOTZERO,NEQ ; Branch to I_MRNOTZERO if i_mr != 0
         0027 002e' 
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Mon Aug 18 20:36:10 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
cur_mod.asm                                                          PAGE    4

     162                                                    ; ARP=AR2, AR0->FR0, AR2->i_mr 
     163            ;----------------------------------------------------------------------------------
     164 0028 bf80                  LACC    #0              ; ACC = 0
         0029 0000  
     165                                                            ; ARP=AR2, AR0->FR0, AR2->i_mr 
     166            ;----------------------------------------------------------------------------------
     167 002a 8b88                  MAR             *,AR0   ; ARP=AR0, AR0->FR0, AR2->i_mr 
     168            ;----------------------------------------------------------------------------------
     169 002b 9080          SACL    *               ; FR0 = tmp = iSq/i_mr = 0  (Q12) if i_mr = 0
     170                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr 
     171            ;----------------------------------------------------------------------------------
     172 002c 7980          B               I_MRZERO ; ARP=AR0, AR0->FR0, AR2->i_mr 
         002d 0040' 
     173            ;----------------------------------------------------------------------------------
     174 002e       I_MRNOTZERO             ; ARP=AR2, AR0->FR0, AR2->i_mr 
     175            ;----------------------------------------------------------------------------------
     176            ; ***** division (iSq/i_mr)
     177            ;----------------------------------------------------------------------------------
     178 002e 1088              LACC        *,AR0   ; ACC = i_mr  (Q12)
     179                                                    ; ARP=AR2, AR0->FR0, AR2->i_mr, ARP=AR0
     180            ;----------------------------------------------------------------------------------
     181 002f e388          BCND    I_MRZERO,EQ ; Branch to I_MRZERO if i_mr = 0
         0030 0040' 
     182                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr          
     183            ;----------------------------------------------------------------------------------
     184 0031 7801                  ADRK    #1              ; ARP=AR0, AR0->FR1, AR2->i_mr
     185            ;----------------------------------------------------------------------------------
     186 0032 1090          LACC    *-              ; ACC = FR1 = iSq  (Q12)
     187                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr
     188            ;----------------------------------------------------------------------------------
     189 0033 be00          ABS                             ; ACC = |iSq|  (Q12)
     190                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr
     191            ;----------------------------------------------------------------------------------
     192 0034 9080                  SACL    *               ; FR0 = tmp = |iSq|  (Q12)
     193                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr  
     194            ;----------------------------------------------------------------------------------
     195 0035 1c8a          LACC    *,12,AR2 ; ACC = |iSq| left shifted 12 bit (tmp=iSq/i_mr=Q12)
     196                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr, ARP=AR2
     197            ;----------------------------------------------------------------------------------
     198 0036 bb0f          RPT             #15             ; Repeat SUBC 16 times
     199                                                    ; ARP=AR2, AR0->FR0, AR2->i_mr
     200            ;----------------------------------------------------------------------------------
     201 0037 0a80                  SUBC    *               ; Dividing |iSq|/i_mr
     202                                                            ; ARP=AR2, AR0->FR0, AR2->i_mr          
     203            ;----------------------------------------------------------------------------------
     204 0038 8b88          MAR             *,AR0   ; ARP=AR0, AR0->FR0, AR2->i_mr
     205            ;----------------------------------------------------------------------------------
     206 0039 90a0          SACL    *+              ; FR0 = tmp = |iSq|/i_mr  (Q12)
     207                                                            ; ARP=AR0, AR0->FR1, AR2->i_mr          
     208            ;----------------------------------------------------------------------------------
     209 003a 1090                  LACC    *-              ; ACC = iSq  (Q12)
     210                                                            ; ARP=AR0, AR0->FR0, AR2->i_mr  
     211            ;----------------------------------------------------------------------------------
     212 003b e304                  BCND    ISQPOS,GT ; Branch to ISQPOS if iSq > 0
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Mon Aug 18 20:36:10 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
cur_mod.asm                                                          PAGE    5

         003c 0040' 
     213                                                            ; ARP=AR0, AR0->FR0, AR2->i_mr 
     214            ;----------------------------------------------------------------------------------
     215 003d 1080          LACC    *               ; ACC = FR0 = tmp = |iSq|/i_mr  (Q12)
     216                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr  
     217            ;----------------------------------------------------------------------------------
     218 003e be02                  NEG                             ; ACC = -|iSq|/i_mr  (Q12)
     219                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr  
     220            ;----------------------------------------------------------------------------------
     221 003f 9080          SACL    *               ; FR0 = tmp = -|iSq|/i_mr  (Q12)
     222                                                    ; ARP=AR0, AR0->FR0, AR2->i_mr
     223            ;----------------------------------------------------------------------------------
     224 0040       ISQPOS                  ; ARP=AR0, AR0->FR0, AR2->i_mr
     225            ;----------------------------------------------------------------------------------