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📄 tusb2136.h

📁 Texas Instruments的TUSB3210和TUSB2136芯片接键盘输入的固件程序源码和驱动程序源码。
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/******************************************************************************
 *                         VAULT INFORMATION SERVICES                         *
 *                          TEXAS INSTRUMENTS, INC.                           *
 *                                                                            * 
 *                             TUSB2136 Header File                           *
 *                                                                            *  
 *----------------------------------------------------------------------------*
 * Programmed by: Lobo Tai (lobotai@ti.com)                                   *
 * Develop Date:  30/Sep/2000                                                 *  
 *----------------------------------------------------------------------------*
 * Description: This header file defines constants that relate to the         *
 *   TUSB2136 design, such as the endpoint configuration, hub config, etc.    *
 *   Constants relating to USB-specific values are contained in usb.h.        *
 ******************************************************************************/

#ifndef _TUSB2136_H_
#define _TUSB2136_H_

#ifdef __cplusplus
extern "C"
{
#endif

// EDB Data Structure
typedef struct _tEDB
{
    BYTE    bEPCNF;             // Endpoint Configuration
    BYTE    bEPBBAX;            // Endpoint X Buffer Base Address
    BYTE    bEPBCTX;            // Endpoint X Buffer byte Count
    BYTE    bSPARE0;            // no used
    BYTE    bSPARE1;            // no used
    BYTE    bEPBBAY;            // Endpoint Y Buffer Base Address
    BYTE    bEPBCTY;            // Endpoint Y Buffer byte Count
    BYTE    bEPSIZXY;           // Endpoint XY Buffer Size
} tEDB, *tpEDB;

typedef struct _tEDB0
{
    BYTE    bIEPCNFG;           // Input Endpoint 0 Configuration Register
    BYTE    bIEPBCNT;           // Input Endpoint 0 Buffer Byte Count
    BYTE    bOEPCNFG;           // Output Endpoint 0 Configuration Register
    BYTE    bOEPBCNT;           // Output Endpoint 0 Buffer Byte Count
} tEDB0, *tpEDB0;

#define SYS_CLOCK 12

/*----------------------------------------------------------------------------+
| Constant Definition                                                         |
+----------------------------------------------------------------------------*/
#define SIZEOF_BOOTCODE_CONFIG_DESC_GROUP SIZEOF_CONFIG_DESCRIPTOR+SIZEOF_INTERFACE_DESCRIPTOR+SIZEOF_ENDPOINT_DESCRIPTOR+SIZEOF_KEYBD_HID_DESCRIPTOR
#define SIZEOF_BOOTCODE_STRING_DESC_GROUP 0x50

#define pbExternalRAM  ((char xdata *)0x0000)       // use this for the future design
#define pbInternalROM  ((char code *)0x0000)

// TUSB2136 VID and PID Definition
#ifdef XXX
#define HUB_VID_L       0x51        // TI = 0x0451
#define HUB_VID_H       0x04
#define HUB_PID_L       0x45        // 1 external interface
#define HUB_PID_H       0x31
#define FUNCTION_PID_L  0x36
#define FUNCTION_PID_H  0x21
#endif

// USB related Constant
#define MAX_ENDPOINT_NUMBER     0x03
#define EP0_MAX_PACKET_SIZE     0x08
#define EP_MAX_PACKET_SIZE      0x40

#define OEP1_X_BUFFER_ADDRESS   0xFD80  // Input  Endpoint 1 X Buffer Base-address
#define OEP1_Y_BUFFER_ADDRESS   0xFDC0  // Input  Endpoint 1 Y Buffer Base-address
#define IEP1_X_BUFFER_ADDRESS   0xFEE8  // Output Endpoint 1 X Buffer Base-address
#define IEP1_Y_BUFFER_ADDRESS   0xFE40  // Output Endpoint 1 Y Buffer Base-address

#define IEP2_X_BUFFER_ADDRESS   0xFE80  // Input  Endpoint 2 X Buffer Base-address
#define IEP2_Y_BUFFER_ADDRESS   0xFE90  // Input  Endpoint 2 Y Buffer Base-address
#define OEP2_X_BUFFER_ADDRESS   0xFEA0  // Output Endpoint 2 X Buffer Base-address
#define OEP2_Y_BUFFER_ADDRESS   0xFEB0  // Output Endpoint 2 Y Buffer Base-address
#define IEP3_X_BUFFER_ADDRESS   0xFEC0  // Input  Endpoint 3 X Buffer Base-address
#define IEP3_Y_BUFFER_ADDRESS   0xFECC  // Input  Endpoint 3 Y Buffer Base-address
#define OEP3_X_BUFFER_ADDRESS   0xFED8  // Output Endpoint 3 X Buffer Base-address
#define OEP3_Y_BUFFER_ADDRESS   0xFEE4  // Output Endpoint 3 Y Buffer Base-address

// Miscellaneous Registers
#define MCNFG_SDW       0x01
#define MCNFG_R0        0x02    // Revision Number R[3:0]
#define MCNFG_R1        0x04
#define MCNFG_R2        0x08
#define MCNFG_R3        0x10
#define MCNFG_OVCE      0x20    // Overcurrent detection enable bit
                                // 0:disable, 1:enable
#define MCNFG_XINT      0x40    // INT1 source control bit
                                // 0:p3.3 1:P2[7:0]
#define MCNFG_24MHZ     0x80    // 12Mhz or 24Mhz MCU clock source
                                // 0:12Mhz 1:24Mhz
#define WDCSR_WDT       0x01    // Watchdog timer reset bit
                                // write a 1 to reset timer
#define WDCSR_WDR       0x40    // Watchdog reset indication bit
                                // 0:a power-up or USB reset
                                // 1:watchdog timeout reset occurred.
#define WDCSR_WDE       0x80    // Watchdog timer enable bit
                                // 0:disable(only cleared on power-up, USB or WDT reset)
                                // 1:enable

// Power Control Register (@ SFR 87h)
// PCON            0x87    // sfr 0x87
#define PCON_IDL        0x01    // MCU idle bit
                                // 0: MCU NOT in idle, 1:MCU idle
#define PCON_GF0        0x04    // General purpose bit
#define PCON_GF1        0x08    // General purpose bit
#define PCON_SMOD       0x80    // Double baud rate control bit

// EndPoint Desciptor Block
#define EPCNF_USBIE     0x04    // USB Interrupt on Transaction Completion. Set By MCU
                                // 0:No Interrupt, 1:Interrupt on completion
#define EPCNF_STALL     0x08    // USB Stall Condition Indication. Set by UBM
                                // 0: No Stall, 1:USB Install Condition
#define EPCNF_DBUF      0x10    // Double Buffer Enable. Set by MCU
                                // 0: Primary Buffer Only(x-buffer only), 1:Toggle Bit Selects Buffer
#define EPCNF_TOGLE     0x20    // USB Toggle bit. This bit reflects the toggle sequence bit of DATA0 and DATA1.
#define EPCNF_ISO       0x40    // ISO=0, Non Isochronous transfer. This bit must be cleared by MCU since only non isochronous transfer is supported.
#define EPCNF_UBME      0x80    // UBM Enable or Disable bit. Set or Clear by MCU.
                                // 0:UBM can't use this endpoint
                                // 1:UBM can use this endpoint
#define EPBCT_BYTECNT_MASK 0x7F // MASK for Buffer Byte Count
#define EPBCT_NAK       0x80    // NAK, 0:No Valid in buffer, 1:Valid packet in buffer

// Endpoint 0 Descriptor Registers
#define EPBCNT_NAK      0x80    // NAK bit
                                // 0:buffer contains valid data
                                // 1:buffer is empty

// USB Registers
#define USBSTA_STPOW    0x01    // Setup Overwrite Bit. Set by hardware when setup packet is received
                                // while there is already a packet in the setup buffer.
                                // 0:Nothing, 1:Setup Overwrite
#define USBSTA_RWUP		0x02	// Remote wakeup overwrite bit
#define USBSTA_SETUP    0x04    // Setup Transaction Received Bit. As long as SETUP is '1',
                                // IN and OUT on endpoint-0 will be NAKed regardless of their real NAK bits values.
#define USBSTA_PWON     0x08    // Power Request for port3
#define USBSTA_PWOFF    0x10    // Power Off Request for port3
#define USBSTA_RESR     0x20    // Function Resume Request Bit. 0:clear by MCU, 1:Function Resume is detected.
#define USBSTA_SUSR     0x40    // Function Suspended Request Bit. 0:clear by MCU, 1:Function Suspend is detected.
#define USBSTA_RSTR     0x80    // Function Reset Request Bit. This bit is set in response to a global or selective suspend condition.
                                // 0:clear by MCU, 1:Function reset is detected.

#define USBMSK_STPOW    0x01    // Setup Overwrite Interrupt Enable Bit
                                // 0: disable, 1:enable
#define USBMSK_RWUP		0x02	
#define USBMSK_SETUP    0x04    // Setup Interrupt Enable Bit
                                // 0: disable, 1:enable
#define USBMSK_RESR     0x20    // Function Resume Interrupt Enable Bit
                                // 0: disable, 1:enable
#define USBMSK_SUSR     0x40    // Function Suspend Interrupt Enable Bit
                                // 0: disable, 1:enable
#define USBMSK_RSTR     0x80    // Function Reset Interrupt Enable Bit
                                // 0: disable, 1:enable

#define USBCTL_DIR      0x01    // USB traffic direction 0: USB out packet, 1:in packet (from TUSB5152 to Host)
#define USBCTL_SIR      0x02    // Setup interrupt status bit
                                // 0: SETUP interrupt is not served.
                                // 1: SETUP interrupt in progess
#define USBCTL_SELF     0x04    // Bus/self powered bit
                                // 0: bus, 1:self
#define USBCTL_RWE      0x08    // remote wakeup enable bit
                                // 0: disable, 1:enable                                
#define USBCTL_FRSTE    0x10    // Function Reset Condition Bit.
                                // This bit connects or disconnects the USB Function Reset from the MCU reset
                                // 0:not connect, 1:connect
#define USBCTL_RWUP     0x20    // Device Remote Wakeup Request
                                // 0:nothing, 1:remote wakeup request to USB Host
#define USBCTL_U12      0x40    // USB Hub version
                                // 0:1.x, 1:2.x
#define USBCTL_CONT     0x80    // Connect or Disconnect Bit
                                // 0:Upstream port is disconnected. Pull-up disabled
                                // 1:Upstream port is connected. Pull-up enabled

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