📄 tusb3410.h
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/*----------------------------------------------------------------------------+
| |
| Texas Instruments |
| TUSB3410 Single Channel Serial Port Controller |
| |
| Bootcode Header File |
| |
+-----------------------------------------------------------------------------+
| Source: tusb3410.h, v 1.0 2001/02/07 12:32:30 |
| Author: Horng-Ming Lobo Tai lobotai@ti.com |
| Header: (none) |
| |
| For more information, please contact |
| |
| Lobo Tai |
| Texas Instruments |
| 12500 TI Blvd, MS 8761 |
| Dallas, TX 75243 |
| USA |
| |
| Tel 214-480-3145 |
| Fax 214-480-3443 |
| |
| Release Notes: (none) |
| Logs: |
| |
| WHO WHEN WHAT |
| --- -------- ----------------------------------------------------- |
| HMT 20010207 born |
| |
+----------------------------------------------------------------------------*/
#ifndef _TUSB3410_H_
#define _TUSB3410_H_
#ifdef __cplusplus
extern "C"
{
#endif
/*----------------------------------------------------------------------------+
| Include files (none) |
+----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------+
| Function Prototype (none) |
+----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------+
| Type Definition & Macro |
+----------------------------------------------------------------------------*/
// EDB Data Structure
typedef struct _tEDB
{
BYTE bEPCNF; // Endpoint Configuration
BYTE bEPBBAX; // Endpoint X Buffer Base Address
BYTE bEPBCTX; // Endpoint X Buffer byte Count
BYTE bSPARE0; // no used
BYTE bSPARE1; // no used
BYTE bEPBBAY; // Endpoint Y Buffer Base Address
BYTE bEPBCTY; // Endpoint Y Buffer byte Count
BYTE bEPSIZXY; // Endpoint XY Buffer Size
} tEDB, *tpEDB;
typedef struct _tEDB0
{
BYTE bIEPCNFG; // Input Endpoint 0 Configuration Register
BYTE bIEPBCNT; // Input Endpoint 0 Buffer Byte Count
BYTE bOEPCNFG; // Output Endpoint 0 Configuration Register
BYTE bOEPBCNT; // Output Endpoint 0 Buffer Byte Count
} tEDB0, *tpEDB0;
//-----------------------------------------------------------------------------
// register address definition
//-----------------------------------------------------------------------------
sfr bPCON = 0x87; // Power Control Register
// Power Control Register (@ SFR 87h)
// PCON 0x87 // sfr 0x87
#define PCON_IDL 0x01 // MCU idle bit
// 0: MCU NOT in idle, 1:MCU idle
#define PCON_GF0 0x04 // General purpose bit
#define PCON_GF1 0x08 // General purpose bit
#define PCON_SMOD 0x80 // Double baud rate control bit
// External Memory Pointer
// don't use this one because it is not efficient in the binary code.
// char *pbExternalRAM = (char *)0x010000;
#define pbExternalRAM ((char xdata *)0x0000) // use this for the future design
#define pbInternalROM ((char code *)0x0000)
// USB related Constant
#define MAX_ENDPOINT_NUMBER 0x03
#define EP0_MAX_PACKET_SIZE 0x08
#define EP0_PACKET_SIZE 0x08
#define EP_MAX_PACKET_SIZE 0x40
#define IEP1_X_BUFFER_ADDRESS 0xF800 // Input Endpoint 1 X Buffer Base-address
#define IEP1_Y_BUFFER_ADDRESS 0xF840 // Input Endpoint 1 Y Buffer Base-address
#define OEP1_X_BUFFER_ADDRESS 0xF880 // Output Endpoint 1 X Buffer Base-address
#define OEP1_Y_BUFFER_ADDRESS 0xF8C0 // Output Endpoint 1 Y Buffer Base-address
#define IEP2_X_BUFFER_ADDRESS 0xF900 // Input Endpoint 2 X Buffer Base-address
#define IEP2_Y_BUFFER_ADDRESS 0xF940 // Input Endpoint 2 Y Buffer Base-address
#define OEP2_X_BUFFER_ADDRESS 0xF980 // Output Endpoint 2 X Buffer Base-address
#define OEP2_Y_BUFFER_ADDRESS 0xF9C0 // Output Endpoint 2 Y Buffer Base-address
#define IEP3_X_BUFFER_ADDRESS 0xFA00 // Input Endpoint 3 X Buffer Base-address
#define IEP3_Y_BUFFER_ADDRESS 0xFA40 // Input Endpoint 3 Y Buffer Base-address
#define OEP3_X_BUFFER_ADDRESS 0xFA80 // Output Endpoint 3 X Buffer Base-address
#define OEP3_Y_BUFFER_ADDRESS 0xFAC0 // Output Endpoint 3 Y Buffer Base-address
// Miscellaneous Registers
#define ROMS_SDW 0x01
#define ROMS_R0 0x02 // Revision Number R[3:0]
#define ROMS_R1 0x04
#define ROMS_R2 0x08
#define ROMS_R3 0x10
#define ROMS_S0 0x20 // Code Size S[1:0]
#define ROMS_S1 0x40 // 00: 4K, 01:8k, 10:16k, 11:32k
#define ROMS_ROA 0x80 // Code Space 0:in ROM, 1:in RAM
// EndPoint Desciptor Block
#define EPCNF_USBIE 0x04 // USB Interrupt on Transaction Completion. Set By MCU
// 0:No Interrupt, 1:Interrupt on completion
#define EPCNF_STALL 0x08 // USB Stall Condition Indication. Set by UBM
// 0: No Stall, 1:USB Install Condition
#define EPCNF_DBUF 0x10 // Double Buffer Enable. Set by MCU
// 0: Primary Buffer Only(x-buffer only), 1:Toggle Bit Selects Buffer
#define EPCNF_TOGLE 0x20 // USB Toggle bit. This bit reflects the toggle sequence bit of DATA0 and DATA1.
#define EPCNF_ISO 0x40 // ISO=0, Non Isochronous transfer. This bit must be cleared by MCU since only non isochronous transfer is supported.
#define EPCNF_UBME 0x80 // UBM Enable or Disable bit. Set or Clear by MCU.
// 0:UBM can't use this endpoint
// 1:UBM can use this endpoint
#define EPBCT_BYTECNT_MASK 0x7F // MASK for Buffer Byte Count
#define EPBCT_NAK 0x80 // NAK, 0:No Valid in buffer, 1:Valid packet in buffer
// Endpoint 0 Descriptor Registers
#define EPBCNT_NAK 0x80 // NAK bit
// 0:buffer contains valid data
// 1:buffer is empty
// USB Registers
#define USBSTA_STPOW 0x01 // Setup Overwrite Bit. Set by hardware when setup packet is received
// while there is already a packet in the setup buffer.
// 0:Nothing, 1:Setup Overwrite
#define USBSTA_WAKEUP 0x02 // Remote wakeup pin status
// 0:Nothing, 1:Remote wakeup request
#define USBSTA_SETUP 0x04 // Setup Transaction Received Bit. As long as SETUP is '1',
// IN and OUT on endpoint-0 will be NAKed regardless of their real NAK bits values.
#define USBSTA_UR1RI 0x08 // Uart 1 Ring Indicator
// 0: no ring coming, 1:ring coming
#define USBSTA_UR2RI 0x10 // Uart 2 Ring Indicator
// 0: no ring coming, 1:ring coming
#define USBSTA_RESR 0x20 // Function Resume Request Bit. 0:clear by MCU, 1:Function Resume is detected.
#define USBSTA_SUSR 0x40 // Function Suspended Request Bit. 0:clear by MCU, 1:Function Suspend is detected.
#define USBSTA_RSTR 0x80 // Function Reset Request Bit. This bit is set in response to a global or selective suspend condition.
// 0:clear by MCU, 1:Function reset is detected.
#define USBMSK_STPOW 0x01 // Setup Overwrite Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_WAKEUP 0x02 // Remote Wakeup Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_SETUP 0x04 // Setup Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_UR1RI 0x08 // UART 1 Ring Indicator Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_UR2RI 0x10 // UART 2 Ring Indicator Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_RESR 0x20 // Function Resume Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_SUSP 0x40 // Function Suspend Interrupt Enable Bit
// 0: disable, 1:enable
#define USBMSK_RSTR 0x80 // Function Reset Interrupt Enable Bit
// 0: disable, 1:enable
#define USBCTL_DIR 0x01 // USB traffic direction 0: USB out packet, 1:in packet (from TUSB5152 to Host)
#define USBCTL_SIR 0x02 // Setup interrupt status bit
// 0: SETUP interrupt is not served.
// 1: SETUP interrupt in progess
#define USBCTL_BS 0x04 // Bus/self powered bit // read only
// 0: bus, 1:self
#define USBCTL_SCEN 0x08 // Smart Card Mode Enable
// 0: disable, 1:enable
#define USBCTL_FRSTE 0x10 // Function Reset Condition Bit.
// This bit connects or disconnects the USB Function Reset from the MCU reset
// 0:not connect, 1:connect
#define USBCTL_RWUP 0x20 // Remote wakeup request
#define USBCTL_IREN 0x40 // IR Mode Enable
// 0: disable, 1:enable
#define USBCTL_CONT 0x80 // Connect or Disconnect Bit
// 0:Upstream port is disconnected. Pull-up disabled
// 1:Upstream port is connected. Pull-up enabled
#define MODECNFG_TXCNTL 0x01 // Transmit Output Control
// 0: hardware, 1:firmware
#define MODECNFG_SOFTSW 0x02 // Soft switch
// 0: disable, 1:enable
#define MODECNFG_CLKOUTEN 0x04 // Clock Output Enable bit
// 0: disable, 1:enable
#define MODECNFG_CLKSLCT 0x08 // Clock Output Souce Select
// 0: UART baud out clock, 1: fixed 4Mhz free running clock
// DMA Control Registers
#define DMA_BASE_ADDRESS 0xFFE0 // all DMA register starts at this address
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