📄 prog_mem.v
字号:
///////////////////////////////////////////////////////////////////////// //////// Mini-RISC-1 //////// Program Memory //////// //////// //////// Author: Rudolf Usselmann //////// rudi@asics.ws //////// //////// //////// D/L from: http://www.opencores.org/cores/minirisc/ //////// ///////////////////////////////////////////////////////////////////////////// //////// Copyright (C) 2000-2002 Rudolf Usselmann //////// www.asics.ws //////// rudi@asics.ws //////// //////// This source file may be used and distributed without //////// restriction provided that this copyright statement is not //////// removed from the file and that any derivative work contains //////// the original copyright notice and the associated disclaimer.//////// //////// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //////// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //////// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //////// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //////// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //////// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //////// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //////// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //////// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //////// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //////// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //////// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //////// POSSIBILITY OF SUCH DAMAGE. //////// /////////////////////////////////////////////////////////////////////////// CVS Log//// $Id: prog_mem.v,v 1.2 2002/09/27 15:35:41 rudi Exp $//// $Date: 2002/09/27 15:35:41 $// $Revision: 1.2 $// $Author: rudi $// $Locker: $// $State: Exp $//// Change History:// $Log: prog_mem.v,v $// Revision 1.2 2002/09/27 15:35:41 rudi// Minor update to newer devices ...//////////////////////`timescale 1ns / 10ps// For simulation only// May be off or on chipmodule prog_mem ( clk, address, we, din, dout );input clk;input [10:0] address;input we;input [11:0] din;output [11:0] dout;parameter depth = 2048;reg [10:0] addr_r;reg [11:0] mem[0:depth-1];always @(posedge clk) addr_r <= address; assign dout = mem[addr_r];always @(posedge clk) if (we) mem[address] <= din;endmodule
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -