syslib.c

s2410测试程序,源码,用来深入了解三星2410芯片

/* sysLib.c - ARM Integrator system-dependent routines */

/* Copyright 1999-2001 ARM Limited */
/* Copyright 1999-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"
  
/* 
modification history
-------------------- 
01q,28may02,m_h  windML not UGL
01p,31oct01,rec  use generic driver for amba timer
01o,09oct01,m_h  configure keyboard if windML is configured
01n,09oct01,jpd  correct sysPhysMemDesc entres for 946es.
01m,03oct01,jpd  tidied slightly
01l,28sep01,pr   added support for ARM946E.
01k,12sep01,m_h  WindML support
01j,27aug01,jb   Adding USB support
01i,21feb01,h_k  added support for ARM966ES and ARM966ES_T.
01h,01dec00,rec  fix typo in INCLUDE_FEI82557END
01g,20nov00,jpd  added support for Intel Ethernet driver.
01f,14jun00,pr   fixed Flash enable/disable with recent versions of FPGA.
01e,18feb00,jpd  minor tidying. Added Core Module Header sysPhysMemDesc entry.
01d,07feb00,jpd  added support for ARM720T, ARM920T.
01c,13jan00,pr	 added support for ARM740T.
01b,07dec99,pr	 added support for PCI.
01a,15nov99,ajb  copied from pid7t version 01o.
*/

/*
DESCRIPTION
This library provides board-specific routines for the ARM Integrator
Development Board BSP.

It #includes the following chip drivers:
    nullVme.c -         dummy VMEbus routines
    s3c2410Timer.c -    S3C2410 timer driver
    s3c2410IntrCtl.c -  S3C2410 interrupt controller driver
    s3c2410Sio.c -	S3C2410 UART driver
    pciIomapLib.c -	PCI I/O mapping support
if INCLUDE_FLASH is defined, it #includes:
    flashMem.c -        Flash memory driver
    nvRamToFlash.c -    driver to use some Flash like NVRAM
else it #includes:
    nullNvRam.c -	dummy NVRAM routines

It #includes the following BSP files:
    sysSerial.c -	serial device initialisation routines
    sysEnd.c -		END network driver support routines.
    pciIomapShow.c -	PCI Show routines

INCLUDE FILES: sysLib.h string.h intLib.h taskLib.h vxLib.h muxLib.h
	       pciIomapLib.h

SEE ALSO:
.pG "Configuration"
.I "ARM Architecture Reference Manual,"
.I "ARM 7TDMI Data Sheet,"
.I "ARM 720T Data Sheet,"
.I "ARM 740T Data Sheet,"
.I "ARM 920T Technical Reference Manual",
.I "ARM 940T Technical Reference Manual",
.I "ARM 946E-S Technical Reference Manual",
.I "ARM 966E-S Technical Reference Manual",
.I "ARM Reference Peripherals Specification,"
.I "ARM Integrator/AP User Guide",
.I "ARM Integrator/CM7TDMI User Guide",
.I "ARM Integrator/CM720T User Guide",
.I "ARM Integrator/CM740T User Guide",
.I "ARM Integrator/CM920T User Guide",
.I "ARM Integrator/CM940T User Guide",
.I "ARM Integrator/CM946E User Guide",
.I "ARM Integrator/CM9x6ES Datasheet".
*/

/* includes */

#include "vxWorks.h"
#include "config.h"

#include "sysLib.h"
#include "string.h"
#include "intLib.h"
#include "taskLib.h"
#include "vxLib.h"
#include "muxLib.h"
#include "cacheLib.h"
#if defined(CPU_720T)  || defined(CPU_720T_T) || \
    defined(CPU_740T)  || defined(CPU_740T_T) || \
    defined(CPU_920T)  || defined(CPU_920T_T) || \
    defined(CPU_940T)  || defined(CPU_940T_T) || \
    defined(CPU_946ES) || defined(CPU_946ES_T)
#include "arch/arm/mmuArmLib.h"
#include "private/vmLibP.h"
#include "dllLib.h"
#endif /* defined(720T/740T/920T/940T/946ES) */

#ifdef INCLUDE_WINDML
#define INCLUDE_AMBAKEYBOARD
#define INCLUDE_AMBAMOUSE
#endif

/* imports */

IMPORT char end [];			    /* end of system, created by ld */
IMPORT VOIDFUNCPTR _func_armIntStackSplit;  /* ptr to fn to split stack */



#if !defined(INCLUDE_MMU) && \
    (defined(INCLUDE_CACHE_SUPPORT) || defined(INCLUDE_MMU_BASIC) || \
     defined(INCLUDE_MMU_FULL) || defined(INCLUDE_MMU_MPU))
#define INCLUDE_MMU
#endif

#if defined(INCLUDE_CACHE_SUPPORT)
#if defined(CPU_7TDMI) || defined(CPU_7TDMI_T) || \
    defined(CPU_966ES) || defined(CPU_966ES_T)
       FUNCPTR sysCacheLibInit = NULL;
#endif /* defined(CPU_7TDMI/7TDMI_T) */

#if	defined(CPU_940T) || defined(CPU_940T_T)
UINT32 * sysCacheUncachedAdrs = (UINT32 *)SYS_CACHE_UNCACHED_ADRS;
#endif /* defined(CPU_940T/940T_T) */
#endif /* defined(INCLUDE_CACHE_SUPPORT) */


/* globals */

#if defined(INCLUDE_MMU)
/*
 * The following structure describes the various different parts of the
 * memory map to be used only during initialisation by
 * vm(Base)GlobalMapInit() when INCLUDE_MMU_BASIC/FULL are
 * defined.
 *
 * Clearly, this structure is only needed if the CPU has an MMU!
 *
 * The following are not the smallest areas that could be allocated for a
 * working system. If the amount of memory used by the page tables is
 * critical, they could be reduced.
 */
PHYS_MEM_DESC sysPhysMemDesc [] =
    {
    /* adrs and length parameters must be page-aligned (multiples of 0x1000) */

    /* DRAM */
    {
    (void *) LOCAL_MEM_LOCAL_ADRS,		/* virtual address */
    (void *) LOCAL_MEM_LOCAL_ADRS,		/* physical address */
    ROUND_UP (LOCAL_MEM_SIZE, PAGE_SIZE), 	/* length, then initial state: */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE
    },

    /*
     * ROM is normally marked as uncacheable by VxWorks. We leave it like that
     * for the time being, even though this has a severe impact on execution
     * speed from ROM.
     */
    {
    (void *) ROM_BASE_ADRS,
    (void *) ROM_BASE_ADRS,
    ROUND_UP (ROM_SIZE_TOTAL, PAGE_SIZE),
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
#ifdef INCLUDE_FLASH
    /* needs to be writable */

    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
#else
    VM_STATE_VALID	| VM_STATE_WRITABLE_NOT  | VM_STATE_CACHEABLE_NOT
#endif
    },

#ifdef INCLUDE_SERIAL
    {
    (void *) UART_0_BASE_ADR,			/* PrimeCell UART */
    (void *) UART_0_BASE_ADR,
    PAGE_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    },
    {
    (void *) UART_1_BASE_ADR,			/* PrimeCell UART */
    (void *) UART_1_BASE_ADR,
    PAGE_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    },
#endif /* INCLUDE_SERIAL */
    };

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);

#endif /* defined(INCLUDE_MMU) */

int	sysCpu	    = CPU;		/* system CPU type (e.g. ARMARCH4/4_T)*/
char *	sysBootLine = BOOT_LINE_ADRS; 	/* address of boot line */
char *	sysExcMsg   = EXC_MSG_ADRS;	/* catastrophic message area */
int	sysProcNum;			/* processor number of this CPU */
int	sysFlags;			/* boot flags */
char	sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */
char	sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */


/* locals */

/* defines */
/* externals */
IMPORT void sngks32cIntDevInit (void);
IMPORT void sysIntStackSplit (char *, long);

/* globals */

/* forward LOCAL functions declarations */


/* forward declarations */

char *	sysPhysMemTop (void);


#if defined (INCLUDE_USB)

#endif

/* included source files */

#ifdef INCLUDE_FLASH
#include "mem/nvRamToFlash.c"
#include "flashMem.c"
#else
#include "mem/nullNvRam.c"
#endif
#include "vme/nullVme.c"
#include "sysSerial.c"

#include "s3c2410Timer.c"
#include "s3c2410Sio.c"
#include "s3c2410IntrCtl.c"

#include "sysEnd.c"

#ifdef INCLUDE_WINDML
#include "ambaKbd.c"
#include "ambaMse.c"
#include "sysWindML.c"
#endif /* INCLUDE_WINDML */

/*******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* NOTE
* This routine does not include all of the possible variants, and the
* inclusion of a variant in here does not mean that it is supported.
*
* RETURNS: A pointer to a string identifying the board and CPU.
*/

char *sysModel (void)
    {
#if	defined(CPU_7TDMI)
    return	"ARM Integrator - ARM7TDMI (ARM)";
#elif	defined(CPU_7TDMI_T)
    return	"ARM Integrator - ARM7TDMI (Thumb)";
#elif	defined(CPU_720T)
    return	"ARM Integrator - ARM720T (ARM)";
#elif	defined(CPU_720T_T)
    return	"ARM Integrator - ARM720T (Thumb)";
#elif	defined(CPU_740T)
    return	"ARM Integrator - ARM740T (ARM)";
#elif	defined(CPU_740T_T)
    return	"ARM Integrator - ARM740T (Thumb)";
#elif	defined(CPU_920T)
    return	"ARM920T -  BSP by hcj && nzj";
#elif	defined(CPU_920T_T)
    return	"ARM Integrator - ARM920T (Thumb)";
#elif	defined(CPU_940T)
    return	"ARM Integrator - ARM940T (ARM)";
#elif	defined(CPU_940T_T)
    return	"ARM Integrator - ARM940T (Thumb)";
#elif   defined(CPU_946ES)
    return      "ARM Integrator - ARM946ES (ARM)";
#elif   defined(CPU_946ES_T)
    return      "ARM Integrator - ARM946ES (Thumb)";
#elif   defined(CPU_966ES)
    return      "ARM Integrator - ARM966ES (ARM)";
#elif   defined(CPU_966ES_T)
    return      "ARM Integrator - ARM966ES (Thumb)";
#else
#error CPU not supported
#endif	/* defined(CPU_7TDMI) */
    }

/*******************************************************************************
*
* sysBspRev - return the BSP version with the revision eg 1.2/<x>
*
* This function returns a pointer to a BSP version with the revision.
* e.g. 1.2/<x>. BSP_REV is concatenated to BSP_VERSION to form the
* BSP identification string.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

#if defined(CPU_720T)  || defined(CPU_720T_T) || \
    defined(CPU_740T)  || defined(CPU_740T_T) || \
    defined(CPU_920T)  || defined(CPU_920T_T) || \
    defined(CPU_940T)  || defined(CPU_940T_T) || \
    defined(CPU_946ES) || defined(CPU_946ES_T)
/*******************************************************************************
*
* sysHwInit0 - perform early BSP-specific initialisation
*
* This routine performs such BSP-specific initialisation as is necessary before
* the architecture-independent cacheLibInit can be called. It is called
* from usrInit() before cacheLibInit(), before sysHwInit() and before BSS
* has been cleared.
*
* RETURNS: N/A
*/

void sysHwInit0 (void)
    {
       IMPORT void PortInit(void);
       IMPORT void MMU_Init(void);
       IMPORT void ChangeClockDivider(int wHdivn, int wPdivn);
       IMPORT void ChangeMPllValue(int wMdiv, int wPdiv, int wSdiv);

	/* 此处应该增加一些系统初始化代码，比如GPIO配置，时钟调整等，MMU控制 */
	MMU_Init();
	ChangeMPllValue(161,3,1);				/* FCLK=202.8 MHz */
	ChangeClockDivider(1, 1);				/* FCLK:HCLK:PCLK = 1:2:4 */
	PortInit();	

#ifdef INCLUDE_CACHE_SUPPORT
    /*
     * Install the appropriate cache library, no address translation
     * routines are required for this BSP, as the default memory map has
     * virtual and physical addresses the same.
     */

#if	defined(CPU_720T) || defined(CPU_720T_T)
    cacheArm720tLibInstall (NULL, NULL);
#elif   defined(CPU_740T) || defined(CPU_740T_T)
    cacheArm740tLibInstall (NULL, NULL);
#elif   defined(CPU_920T) || defined(CPU_920T_T)
    cacheArm920tLibInstall (NULL, NULL);
#elif   defined(CPU_940T) || defined(CPU_940T_T)
    cacheArm940tLibInstall (NULL, NULL);
#elif   defined(CPU_946ES) || defined(CPU_946ES_T)
    cacheArm946eLibInstall (NULL, NULL);
#endif
#endif /* INCLUDE_CACHE_SUPPORT */


#if defined(INCLUDE_MMU)
    /* Install the appropriate MMU library and translation routines */

#if	defined(CPU_720T) || defined(CPU_720T_T)
    mmuArm720tLibInstall (NULL, NULL);
#elif   defined(CPU_740T) || defined(CPU_740T_T)
    mmuArm740tLibInstall (NULL, NULL);
#elif   defined(CPU_920T) || defined(CPU_920T_T)